From: "Ard Biesheuvel" <ardb@kernel.org>
To: Marcin Wojtas <mw@semihalf.com>
Cc: edk2-devel-groups-io <devel@edk2.groups.io>,
Leif Lindholm <leif@nuviainc.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
Sunny Wang <sunny.Wang@arm.com>,
Grzegorz Bernacki <gjb@semihalf.com>,
upstream@semihalf.com
Subject: Re: [edk2-platforms PATCH v2] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables
Date: Wed, 11 Aug 2021 12:41:56 +0200 [thread overview]
Message-ID: <CAMj1kXF6A01qmcMmEe841ukkFZsHvar5tBK-GH_4iMYrY7MnOQ@mail.gmail.com> (raw)
In-Reply-To: <20210810220403.3504123-1-mw@semihalf.com>
On Wed, 11 Aug 2021 at 00:04, Marcin Wojtas <mw@semihalf.com> wrote:
>
> BBR 1.0 spec says that _STA is required for each device in DSDT or SSDT.
> Fix that for all platforms with the Marvell SoC's.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Did you add back the _STA methods that I removed from the secondary
UARTs you introduced in the original series?
> ---
> Changelog:
> v1->v2:
> * Rebase on top of tree
>
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 +++++++++++++++
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 76 ++++++++++++++++++++
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 76 ++++++++++++++++++++
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 12 ++++
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 60 ++++++++++++++++
> 5 files changed, 280 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> index 345c1e4dd6..88e38efeeb 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x000) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU1)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x001) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU2)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x100) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x101) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
>
> Device (AHC0)
> @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "MRVL0002") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "MRVL0004") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> {
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> {
> Name (_HID, "MRVL0100") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> Name (_SEG, 0x00) // _SEG: PCI Segment
> Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_PRT, Package () // _PRT: PCI Routing Table
> {
> Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> index 91401c74c8..77d3aebaf1 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x000) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU1)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x001) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU2)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x100) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x101) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
>
> Device (AHC0)
> @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0002") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0004") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x02) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "MRVL0100") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "MRVL0100") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF4760000, 0x7D)
> @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_SEG, 0x00) // _SEG: PCI Segment
> Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_PRT, Package () // _PRT: PCI Routing Table
> {
> Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> index 7931dc3ef8..a7d1c76e07 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x000) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU1)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x001) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU2)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x100) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x101) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
>
> Device (AHC0)
> @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -92,6 +112,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0002") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -123,6 +147,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0004") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -151,6 +179,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -170,6 +202,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -189,6 +225,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x02) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -208,6 +248,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -235,6 +279,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, ARMADA80X0_MCBIN_DBG2_UART_REG_BASE) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -261,6 +309,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "MRVL0100") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -278,6 +330,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "MRVL0101") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -312,6 +368,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> @@ -351,6 +411,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> @@ -429,6 +493,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> @@ -449,6 +517,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF4760000, 0x7D)
> @@ -475,6 +547,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Name (_SEG, 0x00) // _SEG: PCI Segment
> Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_PRT, Package () // _PRT: PCI Routing Table
> {
> Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> index 8377b13763..d6619e367b 100644
> --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x02) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> index 8c098cd14c..7335e443c6 100644
> --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> @@ -21,21 +21,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x000) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU1)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x001) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU2)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x100) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
> Device (CPU3)
> {
> Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> Name (_UID, 0x101) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> }
>
> Device (AHC0)
> @@ -43,6 +59,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "LNRO001E") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CLS, Package (0x03) // _CLS: Class Code
> {
> 0x01,
> @@ -68,6 +88,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "MRVL0003") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -99,6 +123,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "MRVL0004") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -127,6 +155,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -146,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> Name (_UID, 0x01) // _UID: Unique ID
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -165,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -192,6 +232,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "MRVL0001") // _HID: Hardware ID
> Name (_CID, "HISI0031") // _CID: Compatible ID
> Name (_UID, 0x01) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_ADR, CN913X_DBG2_UART_REG_BASE) // _ADR: Address
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> {
> @@ -218,6 +262,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> {
> Name (_HID, "MRVL0100") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> @@ -240,6 +288,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> Name (_CCA, 0x01) // Cache-coherent controller
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> @@ -318,6 +370,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> {
> Name (_HID, "PRP0001") // _HID: Hardware ID
> Name (_UID, 0x00) // _UID: Unique ID
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> @@ -344,6 +400,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Name (_SEG, 0x00) // _SEG: PCI Segment
> Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Method (_STA) // _STA: Device status
> + {
> + Return (0xF)
> + }
> Name (_PRT, Package () // _PRT: PCI Routing Table
> {
> Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> --
> 2.29.0
>
next prev parent reply other threads:[~2021-08-11 10:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 22:04 [edk2-platforms PATCH v2] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables Marcin Wojtas
2021-08-11 10:41 ` Ard Biesheuvel [this message]
2021-08-11 10:58 ` Marcin Wojtas
2021-08-24 6:00 ` Marcin Wojtas
2021-08-24 9:49 ` Ard Biesheuvel
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