From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.14872.1676036976025341654 for ; Fri, 10 Feb 2023 05:49:36 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QRWnZjF2; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2B869B82526 for ; Fri, 10 Feb 2023 13:49:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 140A6C433A1 for ; Fri, 10 Feb 2023 13:49:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1676036972; bh=eBNCuF0j+Ctu7fVTVjVP6/4WurWMRm5/B66zi7O24kA=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=QRWnZjF2Cp4FcOwwXOFGn1GudlhT74kyp9rNniM+7yqnQn3mtas71uTNKJJG61joM ckHFsL1swf8xW7/+uRoNHU+j1KaWbt/jewNTLzVSIycNWX1FmCnjFR/cMToku+c8TQ nT5V+aa867pIoNvgpMYC5UFTXg4ayXhGHfWjCOx/jrKGDnV9hyA97LA4rwXjEZtfPH o9y5hFMXsr6YPXjeh/AiPzkbxh3xQ7NAcFIc9LntAIu/KrXo4P/jIDxUtHSYz/ncXx 9rEEv6/KSKUDBqCj88GRzEDotbg468uKUd5kiYP6iVgtd2/4hlfBaCHMS45Qvkgmfc 1qlxuUB1G56OQ== Received: by mail-lj1-f178.google.com with SMTP id x29so6282973ljq.0 for ; Fri, 10 Feb 2023 05:49:31 -0800 (PST) X-Gm-Message-State: AO0yUKUJIzZZgUhbOEHDp3maogc4N0I8ga9yRLB5jzModv4L6B2P/hlH C8LD3f/YH4fiLms6XOIN2zS4MhaWI77GUsNJffE= X-Google-Smtp-Source: AK7set8HJU0hAcVyTMx7EzJpemmVAX+lqobW+IMOemGi+9Cg9LWuphLVcqZoBchuN1aSSBVeSEwQ7K0nAEFTfusT6gw= X-Received: by 2002:a05:651c:2cc:b0:290:5920:fc30 with SMTP id f12-20020a05651c02cc00b002905920fc30mr2767436ljo.128.1676036970079; Fri, 10 Feb 2023 05:49:30 -0800 (PST) MIME-Version: 1.0 References: <20230210123041.1489506-1-sunilvl@ventanamicro.com> In-Reply-To: From: "Ard Biesheuvel" Date: Fri, 10 Feb 2023 14:49:18 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-staging/RiscV64QemuVirt PATCH V8 00/19] Add support for RISC-V virt machine To: "Yao, Jiewen" Cc: Sunil V L , "devel@edk2.groups.io" , Abner Chang , Daniel Schaefer , "Kinney, Michael D" , "Gao, Liming" , "Justen, Jordan L" , Gerd Hoffmann , Sami Mujawar , Leif Lindholm , "Dong, Eric" , "Ni, Ray" , "Kumar, Rahul R" , "Liu, Zhiguang" , Anup Patel , Heinrich Schuchardt , "Warkentin, Andrei" Content-Type: text/plain; charset="UTF-8" Acked-by: Ard Biesheuvel I can go and merge this if desired: what is the situation wrt the stable tag? On Fri, 10 Feb 2023 at 14:21, Yao, Jiewen wrote: > > OvmfPkg: Acked-by: Jiewen Yao > > > -----Original Message----- > > From: Sunil V L > > Sent: Friday, February 10, 2023 8:30 PM > > To: devel@edk2.groups.io > > Cc: Abner Chang ; Daniel Schaefer > > ; Kinney, Michael D ; > > Gao, Liming ; Ard Biesheuvel > > ; Yao, Jiewen ; Justen, > > Jordan L ; Gerd Hoffmann ; > > Sami Mujawar ; Leif Lindholm > > ; Dong, Eric ; Ni, Ray > > ; Kumar, Rahul R ; Liu, Zhiguang > > ; Anup Patel ; Heinrich > > Schuchardt ; Warkentin, Andrei > > > > Subject: [edk2-staging/RiscV64QemuVirt PATCH V8 00/19] Add support for RISC- > > V virt machine > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 > > > > Add support for RISC-V qemu virt machine. Most of the changes are migrated > > from > > edk2-platforms repo and added qemu specific libraries under OvmfPkg. > > > > The series has passed CI tests (https://github.com/tianocore/edk2/pull/4023) > > > > These changes are available at: > > https://github.com/vlsunil/edk2/tree/RiscV64QemuVirt_V8 > > > > The series can be tested as per instructions @ > > https://github.com/vlsunil/riscv-uefi-edk2-docs/wiki/RISC-V-Qemu-Virt-support > > > > Changes since V7: > > 1) Addressed feedbacks from Mike and Ray. > > 2) Added Anrdrei as another reviewer for RiscVVirt > > 3) Rebased > > 4) Added RB and ACK tags > > > > Changes since V6: > > 1) Took inspiration from IntelTdx and added all RISC-V qemu related > > libraries and > > modules in OvmfPkg/RiscVVirt instead of directly under > > OvmfPkg/Library. Hoping for > > quicker review since now it shouldn't affect the existing OvmfPkg > > libraries/modules. > > 2) Dropped migration of NvVarStoreFormattedLib for now to avoid > > MdeModulePkg changes. > > Currently RISC-V Qemu doesn't support separate variable flash. So, it > > can be taken > > as a separate activity in future when required. > > 3) Rebased and new CI test request passed > > > > Changes since V5: > > 1) Avoided editing the existing INF files (as per feedback from Ray Ni). > > This reduced > > several refactor patches. > > 2) Moved to PEI less design (as per suggestion from Andrei Warkentin) > > 3) Added PciCpuIO2Dxe driver in OvmfPkg. > > 4) Removed APRIORI requirement in DSC/FDF infrastructure files. Now > > they > > are very similar to ArmVirtQemu. > > 5) Addressed Heinrich's feedback. > > 6) Rebased and added ack tags > > > > Changes since V4: > > 1) Rebased and added ACKs > > 2) Dropped few patches related to VirtNorFlashDxe since they are > > already taken care by Ard. > > > > Changes since V3: > > 1) Addressed Abner's comments > > 2) Changed folder name from Ia32_X64 to Ia32X64 as per latest > > guidelines. > > 2) Rebased > > > > Changes since V2: > > 1) Fixed issues detected by CI > > 2) Added an extra patch to fix up the consumers of > > NvVarStoreFormattedLib > > > > Changes since V1: > > 1) Added couple of patches from Ard to optimize the NorFlashDxe in > > Ovmf. > > Note: There will be a separate patch series in future to update existing > > consumers of NorFlashDxe driver. > > 2) Migrated NvVarStoreFormattedLib from EmbeddedPkg to > > MdeModulePkg > > 3) Created Null instance of the NorFlashPlatformLib library class > > 4) Moved NorFlashPlatformLib.h from ArmPlatformPkg > > > > > > Cc: Abner Chang > > Cc: Daniel Schaefer > > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Ard Biesheuvel > > Cc: Jiewen Yao > > Cc: Jordan Justen > > Cc: Gerd Hoffmann > > Cc: Sami Mujawar > > Cc: Leif Lindholm > > Cc: Eric Dong > > Cc: Ray Ni > > Cc: Rahul Kumar > > Cc: Zhiguang Liu > > Cc: Anup Patel > > Cc: Heinrich Schuchardt > > Cc: Andrei Warkentin > > > > Sunil V L (19): > > MdePkg/Register: Add register definition header files for RISC-V > > MdePkg/BaseLib: RISC-V: Add few more helper functions > > MdePkg: Add BaseRiscVSbiLib Library for RISC-V > > UefiCpuPkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions > > UefiCpuPkg: Add BaseRiscV64CpuExceptionHandlerLib > > UefiCpuPkg: Add BaseRiscV64CpuTimerLib library > > UefiCpuPkg: Add CpuTimerDxeRiscV64 module > > UefiCpuPkg: Add CpuDxeRiscV64 module > > UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file > > ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg > > ArmVirtPkg: Fix up the location of PlatformHasAcpiDtDxe > > OvmfPkg/RiscVVirt: Add PlatformBootManagerLib library > > OvmfPkg/RiscVVirt: Add PrePiHobListPointerLib library > > OvmfPkg/RiscVVirt: Add ResetSystemLib library > > OvmfPkg/RiscVVirt: Add VirtNorFlashPlatformLib library > > OvmfPkg/RiscVVirt: Add PciCpuIo2Dxe module > > OvmfPkg/RiscVVirt: Add SEC module > > OvmfPkg/RiscVVirt: Add build files for Qemu Virt platform > > Maintainers.txt: Add entry for OvmfPkg/RiscVVirt > > > > ArmVirtPkg/ArmVirtPkg.dec | 9 - > > MdePkg/MdePkg.dec | 4 + > > OvmfPkg/OvmfPkg.dec | 7 + > > UefiCpuPkg/UefiCpuPkg.dec | 7 + > > OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 336 > > ++++++ > > ArmVirtPkg/ArmVirtCloudHv.dsc | 2 +- > > ArmVirtPkg/ArmVirtQemu.dsc | 4 +- > > ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +- > > MdePkg/MdePkg.dsc | 3 + > > ArmVirtPkg/ArmVirtQemu.dsc => OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc > > | 281 ++--- > > UefiCpuPkg/UefiCpuPkg.dsc | 6 + > > OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 306 > > ++++++ > > ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf > > | 2 +- > > ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf > > | 4 +- > > MdePkg/Library/BaseLib/BaseLib.inf | 3 + > > MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf | > > 26 + > > {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf > > | 3 +- > > > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib. > > inf | 75 ++ > > OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf > > | 23 + > > OvmfPkg/RiscVVirt/Library/ResetSystemLib/BaseResetSystemLib.inf > > | 38 + > > OvmfPkg/RiscVVirt/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf > > | 30 + > > OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | > > 48 + > > OvmfPkg/RiscVVirt/Sec/SecMain.inf | 66 ++ > > UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf | 68 > > ++ > > UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf > > | 51 + > > > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExce > > ptionHandlerLib.inf | 42 + > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf > > | 33 + > > MdePkg/Include/Library/BaseLib.h | 50 + > > MdePkg/Include/Library/BaseRiscVSbiLib.h | 154 > > +++ > > MdePkg/Include/Register/RiscV64/RiscVEncoding.h | > > 119 +++ > > MdePkg/Include/Register/RiscV64/RiscVImpl.h | 25 > > + > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBm.h > > | 45 + > > OvmfPkg/RiscVVirt/Sec/SecMain.h | 102 ++ > > UefiCpuPkg/CpuDxeRiscV64/CpuDxe.h | 199 > > ++++ > > UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h | 177 > > ++++ > > UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h | > > 34 + > > > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandler > > Lib.h | 116 +++ > > MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c | > > 231 +++++ > > {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c > > | 0 > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBm.c > > | 1078 ++++++++++++++++++++ > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/QemuKernel.c > > | 77 ++ > > OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointer.c > > | 65 ++ > > OvmfPkg/RiscVVirt/Library/ResetSystemLib/ResetSystemLib.c > > | 128 +++ > > OvmfPkg/RiscVVirt/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.c > > | 40 + > > OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c | > > 557 ++++++++++ > > OvmfPkg/RiscVVirt/Sec/Cpu.c | 33 + > > OvmfPkg/RiscVVirt/Sec/Memory.c | 263 > > +++++ > > OvmfPkg/RiscVVirt/Sec/Platform.c | 84 ++ > > OvmfPkg/RiscVVirt/Sec/SecMain.c | 104 ++ > > UefiCpuPkg/CpuDxeRiscV64/CpuDxe.c | 365 > > +++++++ > > UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 294 > > ++++++ > > > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandler > > Lib.c | 133 +++ > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c > > | 199 ++++ > > ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 2 +- > > Maintainers.txt | 5 + > > MdePkg/Library/BaseLib/RiscV64/CpuScratch.S | 31 > > + > > MdePkg/Library/BaseLib/RiscV64/ReadTimer.S | 23 > > + > > MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S | 53 > > +- > > MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S | 23 > > + > > MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S | 42 + > > OvmfPkg/RiscVVirt/RiscVVirt.fdf.inc | 41 + > > OvmfPkg/RiscVVirt/Sec/SecEntry.S | 21 + > > OvmfPkg/RiscVVirt/VarStore.fdf.inc | 79 ++ > > UefiCpuPkg/CpuDxeRiscV64/CpuDxe.uni | 13 + > > UefiCpuPkg/CpuDxeRiscV64/CpuDxeExtra.uni | 14 > > + > > UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimer.uni | > > 14 + > > UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerExtra.uni | > > 12 + > > > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExce > > ptionHandlerLib.uni | 13 + > > > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHandle > > r.S | 105 ++ > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.uni > > | 14 + > > UefiCpuPkg/UefiCpuPkg.ci.yaml | 1 + > > 71 files changed, 6452 insertions(+), 205 deletions(-) > > create mode 100644 OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc > > copy ArmVirtPkg/ArmVirtQemu.dsc => OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc > > (66%) > > create mode 100644 OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf > > create mode 100644 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf > > rename {ArmVirtPkg => > > OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf (89%) > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib. > > inf > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/ResetSystemLib/BaseResetSystemLib.inf > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf > > create mode 100644 OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.inf > > create mode 100644 OvmfPkg/RiscVVirt/Sec/SecMain.inf > > create mode 100644 UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf > > create mode 100644 > > UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExce > > ptionHandlerLib.inf > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf > > create mode 100644 MdePkg/Include/Library/BaseRiscVSbiLib.h > > create mode 100644 MdePkg/Include/Register/RiscV64/RiscVEncoding.h > > create mode 100644 MdePkg/Include/Register/RiscV64/RiscVImpl.h > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBm.h > > create mode 100644 OvmfPkg/RiscVVirt/Sec/SecMain.h > > create mode 100644 UefiCpuPkg/CpuDxeRiscV64/CpuDxe.h > > create mode 100644 UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h > > create mode 100644 UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandler > > Lib.h > > create mode 100644 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c > > rename {ArmVirtPkg => > > OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c (100%) > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBm.c > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/QemuKernel.c > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointer.c > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/ResetSystemLib/ResetSystemLib.c > > create mode 100644 > > OvmfPkg/RiscVVirt/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.c > > create mode 100644 OvmfPkg/RiscVVirt/PciCpuIo2Dxe/PciCpuIo2Dxe.c > > create mode 100644 OvmfPkg/RiscVVirt/Sec/Cpu.c > > create mode 100644 OvmfPkg/RiscVVirt/Sec/Memory.c > > create mode 100644 OvmfPkg/RiscVVirt/Sec/Platform.c > > create mode 100644 OvmfPkg/RiscVVirt/Sec/SecMain.c > > create mode 100644 UefiCpuPkg/CpuDxeRiscV64/CpuDxe.c > > create mode 100644 UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandler > > Lib.c > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c > > create mode 100644 MdePkg/Library/BaseLib/RiscV64/CpuScratch.S > > create mode 100644 MdePkg/Library/BaseLib/RiscV64/ReadTimer.S > > create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S > > create mode 100644 MdePkg/Library/BaseRiscVSbiLib/RiscVSbiEcall.S > > create mode 100644 OvmfPkg/RiscVVirt/RiscVVirt.fdf.inc > > create mode 100644 OvmfPkg/RiscVVirt/Sec/SecEntry.S > > create mode 100644 OvmfPkg/RiscVVirt/VarStore.fdf.inc > > create mode 100644 UefiCpuPkg/CpuDxeRiscV64/CpuDxe.uni > > create mode 100644 UefiCpuPkg/CpuDxeRiscV64/CpuDxeExtra.uni > > create mode 100644 UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimer.uni > > create mode 100644 UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerExtra.uni > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExce > > ptionHandlerLib.uni > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHandle > > r.S > > create mode 100644 > > UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.uni > > > > -- > > 2.34.1 >