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From: "Ard Biesheuvel" <ardb@kernel.org>
To: edk2-devel-groups-io <devel@edk2.groups.io>,
	Tomas Pilar <quic_tpilar@quicinc.com>,
	 Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>,
	Ard Biesheuvel <ardb+tianocore@kernel.org>,
	 Leif Lindholm <leif@nuviainc.com>
Subject: Re: [edk2-devel] [PATCH v3] MdeModulePkg: Correct high-memory use in NvmExpressDxe
Date: Thu, 24 Feb 2022 15:19:44 +0100	[thread overview]
Message-ID: <CAMj1kXFAXm3GR=Rnt2k97=yLKoYmUXv36qGf2_khMurTee+pBg@mail.gmail.com> (raw)
In-Reply-To: <20220224132929.2052626-1-quic_tpilar@quicinc.com>

(+ Hao Wu)

On Thu, 24 Feb 2022 at 14:29, Tomas Pilar (tpilar)
<quic_tpilar@quicinc.com> wrote:
>
> Move the logic that stores starting PCI attributes and sets the
> EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute to
> DriverBindingStart() before the memory that backs the
> DMA engine is allocated.
>
> This ensures that the DMA-backing memory is not forcibly allocated
> below 4G in system address map. Otherwise the allocation fails on
> platforms that do not have any memory below the 4G mark and the drive
> initialisation fails.
>
> Leave the PCI device enabling attribute logic in NvmeControllerInit()
> to ensure that the device is re-enabled on reset in case it was
> disabled via PCI attributes.
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Signed-off-by: Tomas Pilar <quic_tpilar@quicinc.com>

This is still not exactly what I had in mind, but I think it's
actually better: the manipulation of the MMIO/IO decode and bus master
attributes occurs in the same place as before (and therefore
potentially multiple times), whereas recording the original value of
the attributes now occurs only once. In that sense, this patch fixes
more than one bug.

Reviewed-by: Ard Biesheuvel <ardb@kernel.org>


> ---
>  .../Bus/Pci/NvmExpressDxe/NvmExpress.c        | 27 +++++++++++++++++++
>  .../Bus/Pci/NvmExpressDxe/NvmExpressHci.c     | 26 +-----------------
>  2 files changed, 28 insertions(+), 25 deletions(-)
>
> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
> index 9d40f67e8e..b70499e3be 100644
> --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
> +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
> @@ -959,6 +959,33 @@ NvmExpressDriverBindingStart (
>        goto Exit;
>      }
>
> +    //
> +    // Save original PCI attributes
> +    //
> +    Status = PciIo->Attributes (
> +                      PciIo,
> +                      EfiPciIoAttributeOperationGet,
> +                      0,
> +                      &Private->PciAttributes
> +                      );
> +
> +    if (EFI_ERROR (Status)) {
> +      return Status;
> +    }
> +
> +    //
> +    // Enable 64-bit DMA support in the PCI layer.
> +    //
> +    Status = PciIo->Attributes (
> +                      PciIo,
> +                      EfiPciIoAttributeOperationEnable,
> +                      EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
> +                      NULL
> +                      );
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status));
> +    }
> +
>      //
>      // 6 x 4kB aligned buffers will be carved out of this buffer.
>      // 1st 4kB boundary is the start of the admin submission queue.
> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
> index ac77afe113..d87212ffb2 100644
> --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
> +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
> @@ -728,20 +728,9 @@ NvmeControllerInit (
>    UINT8                Mn[41];
>
>    //
> -  // Save original PCI attributes and enable this controller.
> +  // Enable this controller.
>    //
>    PciIo  = Private->PciIo;
> -  Status = PciIo->Attributes (
> -                    PciIo,
> -                    EfiPciIoAttributeOperationGet,
> -                    0,
> -                    &Private->PciAttributes
> -                    );
> -
> -  if (EFI_ERROR (Status)) {
> -    return Status;
> -  }
> -
>    Status = PciIo->Attributes (
>                      PciIo,
>                      EfiPciIoAttributeOperationSupported,
> @@ -764,19 +753,6 @@ NvmeControllerInit (
>      return Status;
>    }
>
> -  //
> -  // Enable 64-bit DMA support in the PCI layer.
> -  //
> -  Status = PciIo->Attributes (
> -                    PciIo,
> -                    EfiPciIoAttributeOperationEnable,
> -                    EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
> -                    NULL
> -                    );
> -  if (EFI_ERROR (Status)) {
> -    DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status));
> -  }
> -
>    //
>    // Read the Controller Capabilities register and verify that the NVM command set is supported
>    //
> --
> 2.30.2
>
>
> 
>
>

  reply	other threads:[~2022-02-24 14:20 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-24 13:29 [PATCH v3] MdeModulePkg: Correct high-memory use in NvmExpressDxe Tomas Pilar (tpilar)
2022-02-24 14:19 ` Ard Biesheuvel [this message]
2022-02-24 16:10 ` [edk2-devel] " Rebecca Cran

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