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From: "Ard Biesheuvel" <ardb@kernel.org>
To: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Cc: devel@edk2.groups.io, Leif Lindholm <quic_llindhol@quicinc.com>,
	 Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Sami Mujawar <sami.mujawar@arm.com>
Subject: Re: [edk2-devel] [PATCH edk2-platforms 2/2] SbsaQemu: set CPU model in SMBIOS
Date: Fri, 12 Jul 2024 12:01:13 +0200	[thread overview]
Message-ID: <CAMj1kXFtCUHWEN32Ag8H-CUtb+hEgp2h=t5zzrVKXiQGxomqjw@mail.gmail.com> (raw)
In-Reply-To: <20240712092356.517074-3-marcin.juszkiewicz@linaro.org>

On Fri, 12 Jul 2024 at 11:24, Marcin Juszkiewicz
<marcin.juszkiewicz@linaro.org> wrote:
>
> SbsaQemu platform have several cpu models available. Since start it
> reported "arm-virt" one in SMBIOS instead of real one.
>
> This change replaces it with the real cpu model like Cortex-A57,
> Neoverse-N2 etc.
>
> Requires change in EDK2 to make PcdProcessorVersion dynamic.
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

I am going to make the same remark as I did before in a different
context: how is it guaranteed that the code that sets the PCD executes
before the code that consumes it?

Making PCDs dynamic is usually not the solution here, unless they are
set in the PEI phase and consumed in the DXE phase or after.

The EFI SMBIOS protocol has an 'update string' method that you can
call from a platform driver. That might be a better fit here, and the
PCD can remain fixed, and carry a fallback default value.


> ---
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc           |  2 +-
>  .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf       |  2 +
>  .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 50 +++++++++++++++++++
>  3 files changed, 53 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> index e78f1d71998a..a823a2967525 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> @@ -485,7 +485,6 @@ [PcdsFixedAtBuild.common]
>    # These values are fixed for now, but should be configurable via
>    # something like an emulated SCP.
>    gArmTokenSpaceGuid.PcdProcessorManufacturer|L"QEMU"
> -  gArmTokenSpaceGuid.PcdProcessorVersion|L"arm-virt"
>    gArmTokenSpaceGuid.PcdProcessorSerialNumber|L"SN0000"
>    gArmTokenSpaceGuid.PcdProcessorAssetTag|L"AT0000"
>    gArmTokenSpaceGuid.PcdProcessorPartNumber|L"PN0000"
> @@ -495,6 +494,7 @@ [PcdsFixedAtBuild.common]
>
>  [PcdsDynamicDefault.common]
>    gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
> +  gArmTokenSpaceGuid.PcdProcessorVersion|L"                                "
>
>    # Core and Cluster Count
>    gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|1
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> index 727c8e82d16e..616296f5a485 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> @@ -53,6 +53,8 @@ [Pcd]
>    gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
>    gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
>
> +  gArmTokenSpaceGuid.PcdProcessorVersion
> +
>  [Depex]
>    gEfiAcpiTableProtocolGuid                       ## CONSUMES
>
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> index e0eef54ff907..b19edf5a4ff8 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> @@ -845,6 +845,51 @@ DisableXhciOnOlderPlatVer (
>    return Status;
>  }
>
> +EFI_STATUS
> +UpdateCpuNameInSmbios (
> +  )
> +{
> +  EFI_STATUS  Status;
> +  UINT64      ProcessorId;
> +  UINT16      PartNum;
> +  UINTN       CpuLen;
> +  CHAR16      CpuName[16];
> +
> +  ProcessorId = ArmReadMidr ();
> +  PartNum     = (UINT16)((ProcessorId >> 4) & 0xFFF);
> +
> +  switch (PartNum) {
> +    case 0x51:
> +      StrCpyS (CpuName, 16, L"QEMU Max");
> +      break;
> +    case 0xd07:
> +      StrCpyS (CpuName, 16, L"Arm Cortex-A57");
> +      break;
> +    case 0xd08:
> +      StrCpyS (CpuName, 16, L"Arm Cortex-A72");
> +      break;
> +    case 0xd0c:
> +      StrCpyS (CpuName, 16, L"Arm Neoverse-N1");
> +      break;
> +    case 0xd40:
> +      StrCpyS (CpuName, 16, L"Arm Neoverse-V1");
> +      break;
> +    case 0xd49:
> +      StrCpyS (CpuName, 16, L"Arm Neoverse-N2");
> +      break;
> +    default:
> +      StrCpyS (CpuName, 16, L"virtual cpu");
> +      break;
> +  }
> +
> +  CpuLen = sizeof (CHAR16) * StrLen (CpuName);
> +
> +  Status = PcdSetPtrS (PcdProcessorVersion, &CpuLen, CpuName);
> +  ASSERT_EFI_ERROR (Status);
> +
> +  return Status;
> +}
> +
>  EFI_STATUS
>  EFIAPI
>  InitializeSbsaQemuAcpiDxe (
> @@ -907,5 +952,10 @@ InitializeSbsaQemuAcpiDxe (
>      DEBUG ((DEBUG_ERROR, "Failed to handle XHCI enablement\n"));
>    }
>
> +  Status = UpdateCpuNameInSmbios ();
> +  if (EFI_ERROR (Status)) {
> +    DEBUG ((DEBUG_ERROR, "Failed to set CPU name in SMBIOS\n"));
> +  }
> +
>    return EFI_SUCCESS;
>  }
> --
> 2.45.2
>


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  reply	other threads:[~2024-07-12 10:01 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-12  9:23 [edk2-devel] [PATCH 0/2] Set CPU model in SMBIOS Marcin Juszkiewicz
2024-07-12  9:23 ` [edk2-devel] [PATCH 1/2] ArmPkg: make PcdProcessorVersion dynamic Marcin Juszkiewicz
2024-07-12  9:23 ` [edk2-devel] [PATCH edk2-platforms 2/2] SbsaQemu: set CPU model in SMBIOS Marcin Juszkiewicz
2024-07-12 10:01   ` Ard Biesheuvel [this message]
2024-07-12 10:58     ` Marcin Juszkiewicz
2024-07-15  3:24     ` Nhi Pham via groups.io
2024-07-15  8:24       ` Ard Biesheuvel

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