From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id C9E1A7803D9 for ; Fri, 12 Jul 2024 10:01:28 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=M90ypkU3Ls6ISaPEIti+t629vqwQv2BaPYTytzkoUw8=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20240206; t=1720778488; v=1; b=RMF5FHGhIhEytBGdYewek3Gdkym3nvgNeSpEillRxxdt4LQB+nPgxg00TyTLzA6HoLh7+0+w ZllJrfpupavp0+Z755iiO8k14gEVV7S7E0VL3LtkTdscuC5/BeSyG+hmXMMtSGwgGobD66N55Oj TghBA0P+D1eTWnuT04njGn4cKv9UHYr6nmE45bZa3GY8WlUd6zFyKUiYZbY+ZC3IJwLGrWzwAnW Qq5inBb2TAmvkWdudt9z+8COn8dcBq2qoThdT8MPf0lD4ZsljWUM93gct0osfBBgEA+wG0s3HhU aCCKrMy7CZLa9f/HboaJ7V7hTEkEnNwmTL9VjjdzYx3CA== X-Received: by 127.0.0.2 with SMTP id OtcNYY7687511xwO3eomMw1S; Fri, 12 Jul 2024 03:01:27 -0700 X-Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web10.4374.1720778486603990653 for ; Fri, 12 Jul 2024 03:01:26 -0700 X-Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 12BF761E86 for ; Fri, 12 Jul 2024 10:01:26 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC1A6C32782 for ; Fri, 12 Jul 2024 10:01:25 +0000 (UTC) X-Received: by mail-lj1-f177.google.com with SMTP id 38308e7fff4ca-2eaae2a6dc1so27734571fa.0 for ; Fri, 12 Jul 2024 03:01:25 -0700 (PDT) X-Gm-Message-State: Yhb9ueHEPGzwd5Bje0Zx9QKqx7686176AA= X-Google-Smtp-Source: AGHT+IHGl7a3+d1hETASrc6MYAnZTJVLM5N7VAiwo1+MLVw4SiihaZ9yCNAbAnexR+YMc5rHdfFYQJOdc8WS04F23nQ= X-Received: by 2002:a2e:3306:0:b0:2ee:8454:1c25 with SMTP id 38308e7fff4ca-2eeb316b020mr87000071fa.34.1720778484077; Fri, 12 Jul 2024 03:01:24 -0700 (PDT) MIME-Version: 1.0 References: <20240712092356.517074-1-marcin.juszkiewicz@linaro.org> <20240712092356.517074-3-marcin.juszkiewicz@linaro.org> In-Reply-To: <20240712092356.517074-3-marcin.juszkiewicz@linaro.org> From: "Ard Biesheuvel" Date: Fri, 12 Jul 2024 12:01:13 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH edk2-platforms 2/2] SbsaQemu: set CPU model in SMBIOS To: Marcin Juszkiewicz Cc: devel@edk2.groups.io, Leif Lindholm , Ard Biesheuvel , Sami Mujawar Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Fri, 12 Jul 2024 03:01:26 -0700 Resent-From: ardb@kernel.org Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=RMF5FHGh; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io On Fri, 12 Jul 2024 at 11:24, Marcin Juszkiewicz wrote: > > SbsaQemu platform have several cpu models available. Since start it > reported "arm-virt" one in SMBIOS instead of real one. > > This change replaces it with the real cpu model like Cortex-A57, > Neoverse-N2 etc. > > Requires change in EDK2 to make PcdProcessorVersion dynamic. > > Signed-off-by: Marcin Juszkiewicz I am going to make the same remark as I did before in a different context: how is it guaranteed that the code that sets the PCD executes before the code that consumes it? Making PCDs dynamic is usually not the solution here, unless they are set in the PEI phase and consumed in the DXE phase or after. The EFI SMBIOS protocol has an 'update string' method that you can call from a platform driver. That might be a better fit here, and the PCD can remain fixed, and carry a fallback default value. > --- > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 +- > .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 2 + > .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 50 +++++++++++++++++++ > 3 files changed, 53 insertions(+), 1 deletion(-) > > diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > index e78f1d71998a..a823a2967525 100644 > --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > @@ -485,7 +485,6 @@ [PcdsFixedAtBuild.common] > # These values are fixed for now, but should be configurable via > # something like an emulated SCP. > gArmTokenSpaceGuid.PcdProcessorManufacturer|L"QEMU" > - gArmTokenSpaceGuid.PcdProcessorVersion|L"arm-virt" > gArmTokenSpaceGuid.PcdProcessorSerialNumber|L"SN0000" > gArmTokenSpaceGuid.PcdProcessorAssetTag|L"AT0000" > gArmTokenSpaceGuid.PcdProcessorPartNumber|L"PN0000" > @@ -495,6 +494,7 @@ [PcdsFixedAtBuild.common] > > [PcdsDynamicDefault.common] > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 > + gArmTokenSpaceGuid.PcdProcessorVersion|L" " > > # Core and Cluster Count > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|1 > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > index 727c8e82d16e..616296f5a485 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > @@ -53,6 +53,8 @@ [Pcd] > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase > > + gArmTokenSpaceGuid.PcdProcessorVersion > + > [Depex] > gEfiAcpiTableProtocolGuid ## CONSUMES > > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > index e0eef54ff907..b19edf5a4ff8 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > @@ -845,6 +845,51 @@ DisableXhciOnOlderPlatVer ( > return Status; > } > > +EFI_STATUS > +UpdateCpuNameInSmbios ( > + ) > +{ > + EFI_STATUS Status; > + UINT64 ProcessorId; > + UINT16 PartNum; > + UINTN CpuLen; > + CHAR16 CpuName[16]; > + > + ProcessorId = ArmReadMidr (); > + PartNum = (UINT16)((ProcessorId >> 4) & 0xFFF); > + > + switch (PartNum) { > + case 0x51: > + StrCpyS (CpuName, 16, L"QEMU Max"); > + break; > + case 0xd07: > + StrCpyS (CpuName, 16, L"Arm Cortex-A57"); > + break; > + case 0xd08: > + StrCpyS (CpuName, 16, L"Arm Cortex-A72"); > + break; > + case 0xd0c: > + StrCpyS (CpuName, 16, L"Arm Neoverse-N1"); > + break; > + case 0xd40: > + StrCpyS (CpuName, 16, L"Arm Neoverse-V1"); > + break; > + case 0xd49: > + StrCpyS (CpuName, 16, L"Arm Neoverse-N2"); > + break; > + default: > + StrCpyS (CpuName, 16, L"virtual cpu"); > + break; > + } > + > + CpuLen = sizeof (CHAR16) * StrLen (CpuName); > + > + Status = PcdSetPtrS (PcdProcessorVersion, &CpuLen, CpuName); > + ASSERT_EFI_ERROR (Status); > + > + return Status; > +} > + > EFI_STATUS > EFIAPI > InitializeSbsaQemuAcpiDxe ( > @@ -907,5 +952,10 @@ InitializeSbsaQemuAcpiDxe ( > DEBUG ((DEBUG_ERROR, "Failed to handle XHCI enablement\n")); > } > > + Status = UpdateCpuNameInSmbios (); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to set CPU name in SMBIOS\n")); > + } > + > return EFI_SUCCESS; > } > -- > 2.45.2 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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