Re: [edk2-devel] [PATCH v1] MinPlatformPkg: Add PCD PcdMinPciBridgePC00 to support \_SB.PCI0 and \_SB.PC00

["Ard Biesheuvel" <ardb@kernel.org>]

On Tue, 31 Jan 2023 at 08:47, Chen, Aryeh <aryeh.chen@intel.com> wrote:
>
> Hi Biesheuvel,
>
> The platform which before ADL, like TGL uses \_SB.PCI0, but ADL and later uses \_SB.PC00.
> Minplatform should support all platform and Pcd PcdMinPciBridgePC00 can set on OpenBoard.dsc for PCI0 or PC00.
>

Thanks for the explanation. I think this is a rather ugly hack, but I
suppose it is really needed.


>
> -----Original Message-----
> From: Ard Biesheuvel <ardb@kernel.org>
> Sent: Tuesday, January 31, 2023 3:32 PM
> To: devel@edk2.groups.io; Chen, Aryeh <aryeh.chen@intel.com>
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
> Subject: Re: [edk2-devel] [PATCH v1] MinPlatformPkg: Add PCD PcdMinPciBridgePC00 to support \_SB.PCI0 and \_SB.PC00
>
> On Tue, 31 Jan 2023 at 06:46, Chen, Aryeh <aryeh.chen@intel.com> wrote:
> >
> > From: Aryeh Chen <aryeh.chen@intel.com>
> >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4329
> >
> > To add PCD PcdMinPciBridgePC00 to support \_SB.PCI0 and \_SB.PC00 on
> > MinDsdt.asl because PciBridge has modified from \_SB.PCI0 to
> > \_SB.PC00 since Client ADL platform.
> >
> > Signed-off-by: Aryeh Chen <aryeh.chen@intel.com>
> > Cc: Chasel Chiu <chasel.chiu@intel.com>
> > Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> > Cc: Isaac Oram <isaac.w.oram@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Eric Dong <eric.dong@intel.com>
>
> Why is this needed?
>
> > ---
> >  Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl | 4 ++++
> > Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.inf | 1 +
> >  Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec       | 3 +++
> >  3 files changed, 8 insertions(+)
> >
> > diff --git a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> > b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> > index 4efb8709ac..b7361b6d44 100644
> > --- a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> > +++ b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> > @@ -23,7 +23,11 @@ DefinitionBlock (
> >    //---------------------------------------------------------------------------
> >    // Begin PCI tree object scope
> >
> > //--------------------------------------------------------------------
> > -------
> > +#if FixedPcdGetBool (PcdMinPciBridgePC00) == 1
> > +    Device(PC00) { // PCI Bridge "Host Bridge"
> > +#else
> >      Device(PCI0) { // PCI Bridge "Host Bridge"
> > +#endif
> >        Name(_HID, EISAID("PNP0A08")) // Indicates PCI Express/PCI-X Mode2 host hierarchy
> >        Name(_CID, EISAID("PNP0A03")) // To support legacy OS that doesn't understand the new HID
> >        Name(_SEG, 0)
> > diff --git a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.inf
> > b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.inf
> > index 3437bc489c..b3b45039cc 100644
> > --- a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.inf
> > +++ b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.inf
> > @@ -40,6 +40,7 @@
> >  [Pcd]
> >    gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
> >    gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
> > +  gMinPlatformPkgTokenSpaceGuid.PcdMinPciBridgePC00
> >
> >  [Depex]
> >    gEfiAcpiTableProtocolGuid           AND
> > diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > index e6f714b181..68a76db4de 100644
> > --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > @@ -139,6 +139,9 @@
> >    gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkRegisterBitWidth|0x00|UINT8|0x00010056
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055
> >
> > +  # The PCD controls MinDsdt PciBridge
> > +
> > + gMinPlatformPkgTokenSpaceGuid.PcdMinPciBridgePC00|FALSE|BOOLEAN|0x00
> > + 010057
> > +
> >    #
> >    # FADT Duty Offset - The zero-based index of where the processor's duty cycle
> >    # setting is within the processor's P_CNT register.
> > --
> > 2.26.2.windows.1
> >
> >
> >
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