From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id CB88C9419DC for ; Wed, 22 Nov 2023 15:45:56 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=lnwuwhlZ0QNzvRYMpjzJigmsYXxn/j8Kgm70uWKBQeU=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1700667955; v=1; b=npzqJLe1Be68fLLnC3j08KQHDl8h3EEwjChLKf93LZRoVUTw3reugdecs0eDFPze2Z/6gB5w VcDPgICfZ3ewPTVpqF5Ouky+s1cdK9jn8J6NAOw2BAdWP6cMKqh9RxK4R/UtG1laZlxx+SqHqie SmhyYnOnP1fkWQ2VeNpvgICg= X-Received: by 127.0.0.2 with SMTP id E3fcYY7687511xTR2o2noCvp; Wed, 22 Nov 2023 07:45:55 -0800 X-Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by mx.groups.io with SMTP id smtpd.web11.22809.1700667954492345698 for ; Wed, 22 Nov 2023 07:45:55 -0800 X-Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 24C81CE2107 for ; Wed, 22 Nov 2023 15:45:51 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id 33F1AC433C7 for ; Wed, 22 Nov 2023 15:45:50 +0000 (UTC) X-Received: by mail-lj1-f169.google.com with SMTP id 38308e7fff4ca-2c88750e7d1so35630061fa.3 for ; Wed, 22 Nov 2023 07:45:50 -0800 (PST) X-Gm-Message-State: pJgBvFN1KFJSwZpssJmZd6KKx7686176AA= X-Google-Smtp-Source: AGHT+IHn8gv001Rx8+6uD11XTRCQydt8ycxmh0E1f/CE3SanjdwDCNbKB9qQSwFJUIdmqo/3gbbyNEHvyjTUNJESxbE= X-Received: by 2002:a2e:2a82:0:b0:2c5:16c0:6239 with SMTP id q124-20020a2e2a82000000b002c516c06239mr1829611ljq.51.1700667948438; Wed, 22 Nov 2023 07:45:48 -0800 (PST) MIME-Version: 1.0 References: <20231103025131.1643-1-yuinyee.chew@starfivetech.com> <20231103025131.1643-3-yuinyee.chew@starfivetech.com> In-Reply-To: <20231103025131.1643-3-yuinyee.chew@starfivetech.com> From: "Ard Biesheuvel" Date: Wed, 22 Nov 2023 16:45:37 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH v3 2/5] DesignWare/DwEmmcDxe: Add CPU little endian option To: devel@edk2.groups.io, yuinyee.chew@starfivetech.com Cc: mindachen1987 , Sunil V L , Leif Lindholm , Michael D Kinney , Li Yong , mindachen1987 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=npzqJLe1; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Fri, 3 Nov 2023 at 03:52, John Chew wrote: > > From: mindachen1987 > > Add PCD for little endian CPU. During RX, the endianess of data receive > via DMA will be swap. > I take it this means that the IP can be synthesized in both little and big endian versions, right? Is there no ID register in the hardware you can derive this information from? Using PCDs like this generally not preferred, as it interferes with the driver model. However, this driver does not implement the driver model to begin with, so I suppose there is no issue here in that sense. > Cc: Sunil V L > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Michael D Kinney > Cc: Li Yong > Co-authored-by: mindachen1987 > Signed-off-by: John Chew > --- > Silicon/Synopsys/DesignWare/DesignWare.dec | 1 + > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c | 5 +++++ > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + > 3 files changed, 7 insertions(+) > > diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dec b/Silicon/Synopsys/DesignWare/DesignWare.dec > index f7ec7927543c..751370a8b1af 100755 > --- a/Silicon/Synopsys/DesignWare/DesignWare.dec > +++ b/Silicon/Synopsys/DesignWare/DesignWare.dec > @@ -31,3 +31,4 @@ [PcdsFixedAtBuild.common] > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000003 > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000004 > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000005 > + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian|FALSE|BOOLEAN|0x00000008 > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > index 7ac286c5f361..edda28a45d7c 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > @@ -588,6 +588,11 @@ DwEmmcReadBlockData ( > } > Status = DwEmmcWaitDmaComplete(This, 1); > > + if (DWMCI_SD_READ_MASK(mDwEmmcArgument) && (FixedPcdGetBool (PcdDwEmmcDxeCPULittleEndian))) { > + Buffer[3] = SwapBytes32(Buffer[3]); > + Buffer[4] = SwapBytes32(Buffer[4]); > + } > + > out: > // Restore Tpl > gBS->RestoreTPL (Tpl); > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > index 7f70fe1e2a38..18c84a4172f9 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > @@ -51,6 +51,7 @@ [Pcd] > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth > gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers > + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian > > [Depex] > TRUE > -- > 2.34.1 > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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