From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 8A466D80D4E for ; Thu, 7 Sep 2023 13:55:20 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=GX8n0v0bcuM5DMxER4/PXj9YgmOX+2LucvqiwgR/UPA=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1694094919; v=1; b=Ci/ATcXXw3PIoLb/7aiy+zxFPQRMV0DS3sfIwAneA3Lt9kfg0WrtXLw9IbqoMw+Yi1dhHdD0 2SBzy41r/Cku9rilksuGkaD738GILMxw1ad7KzpeZExNsobLJEdntxL++GS+tjv5u2wQPu9k6IX eNyj9eEer+fzQkNcV1bUkDuE= X-Received: by 127.0.0.2 with SMTP id nhr9YY7687511xtPfW3taP7k; Thu, 07 Sep 2023 06:55:19 -0700 X-Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.13547.1694094918307796731 for ; Thu, 07 Sep 2023 06:55:18 -0700 X-Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BF506B81E2C for ; Thu, 7 Sep 2023 13:55:16 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7B9A9C4AF5C for ; Thu, 7 Sep 2023 13:55:15 +0000 (UTC) X-Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-500913779f5so1670365e87.2 for ; Thu, 07 Sep 2023 06:55:15 -0700 (PDT) X-Gm-Message-State: D9riyox4VpNJf1NT6onNXu8mx7686176AA= X-Google-Smtp-Source: AGHT+IG+caLpqYsKPkkrHoVOqbxJjWikdAaHIPH5PFB2zML9PJigjNKpB21SoQ4zYJnLVPi9d8L8Vwq4+mAsKwWe2H4= X-Received: by 2002:ac2:5e65:0:b0:4fb:8939:d95c with SMTP id a5-20020ac25e65000000b004fb8939d95cmr4382048lfr.30.1694094913508; Thu, 07 Sep 2023 06:55:13 -0700 (PDT) MIME-Version: 1.0 References: <20230704095230.215607-1-kraxel@redhat.com> In-Reply-To: <20230704095230.215607-1-kraxel@redhat.com> From: "Ard Biesheuvel" Date: Thu, 7 Sep 2023 15:55:02 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH 1/1] OvmfPkg/Include: remove QemuSmramSaveStateMap.h To: Gerd Hoffmann Cc: devel@edk2.groups.io, Jordan Justen , Tom Lendacky , Jiewen Yao , Michael Roth , Min Xu , Erdem Aktas , James Bottomley , Ard Biesheuvel Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="Ci/ATcXX"; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none) On Tue, 4 Jul 2023 at 11:52, Gerd Hoffmann wrote: > > The qemu/kvm SMM emulation uses the AMD SaveState layout. > > So, now that we have AMD SaveState support merged we can just use > Amd/SmramSaveStateMap.h, QemuSmramSaveStateMap.h is not needed any more. > > Signed-off-by: Gerd Hoffmann Acked-by: Ard Biesheuvel I'll queue this one up as well. > --- > .../Include/Register/QemuSmramSaveStateMap.h | 178 ------------------ > .../PeiDxeMemEncryptSevLibInternal.c | 4 +- > .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 21 +-- > 3 files changed, 12 insertions(+), 191 deletions(-) > delete mode 100644 OvmfPkg/Include/Register/QemuSmramSaveStateMap.h > > diff --git a/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h b/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h > deleted file mode 100644 > index 8ffde0548c4c..000000000000 > --- a/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h > +++ /dev/null > @@ -1,178 +0,0 @@ > -/** @file > -SMRAM Save State Map Definitions. > - > -SMRAM Save State Map definitions based on contents of the > -Intel(R) 64 and IA-32 Architectures Software Developer's Manual > - Volume 3C, Section 34.4 SMRAM > - Volume 3C, Section 34.5 SMI Handler Execution Environment > - Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs > - > -and the AMD64 Architecture Programmer's Manual > - Volume 2, Section 10.2 SMM Resources > - > -Copyright (c) 2015, Intel Corporation. All rights reserved.
> -Copyright (c) 2015, Red Hat, Inc.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#ifndef __QEMU_SMRAM_SAVE_STATE_MAP_H__ > -#define __QEMU_SMRAM_SAVE_STATE_MAP_H__ > - > -#pragma pack (1) > - > -/// > -/// 32-bit SMRAM Save State Map > -/// > -typedef struct { > - UINT8 Reserved0[0x200]; // 7c00h > - UINT8 Reserved1[0xf8]; // 7e00h > - UINT32 SMBASE; // 7ef8h > - UINT32 SMMRevId; // 7efch > - UINT16 IORestart; // 7f00h > - UINT16 AutoHALTRestart; // 7f02h > - UINT8 Reserved2[0x9C]; // 7f08h > - UINT32 IOMemAddr; // 7fa0h > - UINT32 IOMisc; // 7fa4h > - UINT32 _ES; // 7fa8h > - UINT32 _CS; // 7fach > - UINT32 _SS; // 7fb0h > - UINT32 _DS; // 7fb4h > - UINT32 _FS; // 7fb8h > - UINT32 _GS; // 7fbch > - UINT32 Reserved3; // 7fc0h > - UINT32 _TR; // 7fc4h > - UINT32 _DR7; // 7fc8h > - UINT32 _DR6; // 7fcch > - UINT32 _EAX; // 7fd0h > - UINT32 _ECX; // 7fd4h > - UINT32 _EDX; // 7fd8h > - UINT32 _EBX; // 7fdch > - UINT32 _ESP; // 7fe0h > - UINT32 _EBP; // 7fe4h > - UINT32 _ESI; // 7fe8h > - UINT32 _EDI; // 7fech > - UINT32 _EIP; // 7ff0h > - UINT32 _EFLAGS; // 7ff4h > - UINT32 _CR3; // 7ff8h > - UINT32 _CR0; // 7ffch > -} QEMU_SMRAM_SAVE_STATE_MAP32; > - > -/// > -/// 64-bit SMRAM Save State Map > -/// > -typedef struct { > - UINT8 Reserved0[0x200]; // 7c00h > - > - UINT16 _ES; // 7e00h > - UINT16 _ESAccessRights; // 7e02h > - UINT32 _ESLimit; // 7e04h > - UINT64 _ESBase; // 7e08h > - > - UINT16 _CS; // 7e10h > - UINT16 _CSAccessRights; // 7e12h > - UINT32 _CSLimit; // 7e14h > - UINT64 _CSBase; // 7e18h > - > - UINT16 _SS; // 7e20h > - UINT16 _SSAccessRights; // 7e22h > - UINT32 _SSLimit; // 7e24h > - UINT64 _SSBase; // 7e28h > - > - UINT16 _DS; // 7e30h > - UINT16 _DSAccessRights; // 7e32h > - UINT32 _DSLimit; // 7e34h > - UINT64 _DSBase; // 7e38h > - > - UINT16 _FS; // 7e40h > - UINT16 _FSAccessRights; // 7e42h > - UINT32 _FSLimit; // 7e44h > - UINT64 _FSBase; // 7e48h > - > - UINT16 _GS; // 7e50h > - UINT16 _GSAccessRights; // 7e52h > - UINT32 _GSLimit; // 7e54h > - UINT64 _GSBase; // 7e58h > - > - UINT32 _GDTRReserved1; // 7e60h > - UINT16 _GDTRLimit; // 7e64h > - UINT16 _GDTRReserved2; // 7e66h > - UINT64 _GDTRBase; // 7e68h > - > - UINT16 _LDTR; // 7e70h > - UINT16 _LDTRAccessRights; // 7e72h > - UINT32 _LDTRLimit; // 7e74h > - UINT64 _LDTRBase; // 7e78h > - > - UINT32 _IDTRReserved1; // 7e80h > - UINT16 _IDTRLimit; // 7e84h > - UINT16 _IDTRReserved2; // 7e86h > - UINT64 _IDTRBase; // 7e88h > - > - UINT16 _TR; // 7e90h > - UINT16 _TRAccessRights; // 7e92h > - UINT32 _TRLimit; // 7e94h > - UINT64 _TRBase; // 7e98h > - > - UINT64 IO_RIP; // 7ea0h > - UINT64 IO_RCX; // 7ea8h > - UINT64 IO_RSI; // 7eb0h > - UINT64 IO_RDI; // 7eb8h > - UINT32 IO_DWord; // 7ec0h > - UINT8 Reserved1[0x04]; // 7ec4h > - UINT8 IORestart; // 7ec8h > - UINT8 AutoHALTRestart; // 7ec9h > - UINT8 Reserved2[0x06]; // 7ecah > - > - UINT64 IA32_EFER; // 7ed0h > - UINT64 SVM_Guest; // 7ed8h > - UINT64 SVM_GuestVMCB; // 7ee0h > - UINT64 SVM_GuestVIntr; // 7ee8h > - UINT8 Reserved3[0x0c]; // 7ef0h > - > - UINT32 SMMRevId; // 7efch > - UINT32 SMBASE; // 7f00h > - > - UINT8 Reserved4[0x1c]; // 7f04h > - UINT64 SVM_GuestPAT; // 7f20h > - UINT64 SVM_HostIA32_EFER; // 7f28h > - UINT64 SVM_HostCR4; // 7f30h > - UINT64 SVM_HostCR3; // 7f38h > - UINT64 SVM_HostCR0; // 7f40h > - > - UINT64 _CR4; // 7f48h > - UINT64 _CR3; // 7f50h > - UINT64 _CR0; // 7f58h > - UINT64 _DR7; // 7f60h > - UINT64 _DR6; // 7f68h > - UINT64 _RFLAGS; // 7f70h > - UINT64 _RIP; // 7f78h > - UINT64 _R15; // 7f80h > - UINT64 _R14; // 7f88h > - UINT64 _R13; // 7f90h > - UINT64 _R12; // 7f98h > - UINT64 _R11; // 7fa0h > - UINT64 _R10; // 7fa8h > - UINT64 _R9; // 7fb0h > - UINT64 _R8; // 7fb8h > - UINT64 _RDI; // 7fc0h > - UINT64 _RSI; // 7fc8h > - UINT64 _RBP; // 7fd0h > - UINT64 _RSP; // 7fd8h > - UINT64 _RBX; // 7fe0h > - UINT64 _RDX; // 7fe8h > - UINT64 _RCX; // 7ff0h > - UINT64 _RAX; // 7ff8h > -} QEMU_SMRAM_SAVE_STATE_MAP64; > - > -/// > -/// Union of 32-bit and 64-bit SMRAM Save State Maps > -/// > -typedef union { > - QEMU_SMRAM_SAVE_STATE_MAP32 x86; > - QEMU_SMRAM_SAVE_STATE_MAP64 x64; > -} QEMU_SMRAM_SAVE_STATE_MAP; > - > -#pragma pack () > - > -#endif > diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c > index 78ea16ae06ff..43a2a3e3b7e3 100644 > --- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c > +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c > @@ -12,7 +12,7 @@ > #include > #include > #include > -#include > +#include > #include > #include > > @@ -49,7 +49,7 @@ MemEncryptSevLocateInitialSmramSaveStateMapPages ( > } > > MapStart = SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET; > - MapEnd = MapStart + sizeof (QEMU_SMRAM_SAVE_STATE_MAP); > + MapEnd = MapStart + sizeof (AMD_SMRAM_SAVE_STATE_MAP); > MapPagesStart = MapStart & ~(UINTN)EFI_PAGE_MASK; > MapPagesEnd = ALIGN_VALUE (MapEnd, EFI_PAGE_SIZE); > MapPagesSize = MapPagesEnd - MapPagesStart; > diff --git a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > index 4c354bafe42f..63822b126e3d 100644 > --- a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > +++ b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > @@ -20,8 +20,7 @@ > #include > #include > #include > -#include > -#include > +#include > #include > > // > @@ -90,15 +89,15 @@ SmmCpuFeaturesInitializeProcessor ( > IN CPU_HOT_PLUG_DATA *CpuHotPlugData > ) > { > - QEMU_SMRAM_SAVE_STATE_MAP *CpuState; > + AMD_SMRAM_SAVE_STATE_MAP *CpuState; > > // > // Configure SMBASE. > // > - CpuState = (QEMU_SMRAM_SAVE_STATE_MAP *)(UINTN)( > - SMM_DEFAULT_SMBASE + > - SMRAM_SAVE_STATE_MAP_OFFSET > - ); > + CpuState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)( > + SMM_DEFAULT_SMBASE + > + SMRAM_SAVE_STATE_MAP_OFFSET > + ); > if ((CpuState->x86.SMMRevId & 0xFFFF) == 0) { > CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex]; > } else { > @@ -150,10 +149,10 @@ SmmCpuFeaturesHookReturnFromSmm ( > IN UINT64 NewInstructionPointer > ) > { > - UINT64 OriginalInstructionPointer; > - QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState; > + UINT64 OriginalInstructionPointer; > + AMD_SMRAM_SAVE_STATE_MAP *CpuSaveState; > > - CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)CpuState; > + CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState; > if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) { > OriginalInstructionPointer = (UINT64)CpuSaveState->x86._EIP; > CpuSaveState->x86._EIP = (UINT32)NewInstructionPointer; > @@ -166,7 +165,7 @@ SmmCpuFeaturesHookReturnFromSmm ( > } > } else { > OriginalInstructionPointer = CpuSaveState->x64._RIP; > - if ((CpuSaveState->x64.IA32_EFER & LMA) == 0) { > + if ((CpuSaveState->x64.EFER & LMA) == 0) { > CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer32; > } else { > CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer; > -- > 2.41.0 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#108391): https://edk2.groups.io/g/devel/message/108391 Mute This Topic: https://groups.io/mt/99943529/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-