From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web12.7469.1627552696996538730 for ; Thu, 29 Jul 2021 02:58:17 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UWZEkP4h; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id D216C61059 for ; Thu, 29 Jul 2021 09:58:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627552695; bh=sUBA+XBz3stHmlFn+RqjWQXp53KnQP/Ko1wQbQ8ny3o=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=UWZEkP4hbqpXkkBlAQ/CVY2pKTvNcJLLKleE2hB8/JMk347MsPQ9B4aUdiNCe9S99 CbUQO5+jDD1/l6j3z5SrYcUfBHRSxRwM2ieq/tWX01Bc7Mb9hWevy3GdxGuN9eiCSX GN/YKdSwMp3R2ZK4Yp5mZRqN7dRE6oNqZgwql3wBXtS/WHuZUVz5NPSG4IPWlBG9HN v8rZtocNZ4woZUey8FhhhPvxe9uQZZTgAHMaoy77OVdrDne2FJfXjYBtMQdWBSd3I1 s/CdM7Efn/eHAbukc3Dsu8CQHCjWLSI6se9SmxaXqRL/qNePc6qSpTAHrlcMGD/pH5 DdnpaZBhXF7EQ== Received: by mail-oo1-f46.google.com with SMTP id t1-20020a4a54010000b02902638ef0f883so1432114ooa.11 for ; Thu, 29 Jul 2021 02:58:15 -0700 (PDT) X-Gm-Message-State: AOAM530ZCyJEtyACn0oZVS0eSznL53g7FPp6aW3SwIXp/bxvVPVHy82e 13k8eFIiG6JNq1rSfrmI5sQGYUk+FAsxz9lCCEM= X-Google-Smtp-Source: ABdhPJw4RtGrnyBv0Uifzg2GknEftP4yxk1vQE2HQi4t8ZoqUz1UMuKFC0WiWrARffzGAzHL3SbrVGuyBoLS9cgqGi0= X-Received: by 2002:a4a:6558:: with SMTP id z24mr2409652oog.41.1627552694822; Thu, 29 Jul 2021 02:58:14 -0700 (PDT) MIME-Version: 1.0 References: <20210719093015.1490932-1-mw@semihalf.com> <20210719093015.1490932-3-mw@semihalf.com> In-Reply-To: From: "Ard Biesheuvel" Date: Thu, 29 Jul 2021 11:57:34 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables To: Marcin Wojtas Cc: Samer El-Haj-Mahmoud , edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , upstream@semihalf.com, Jon Nettleton Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 29 Jul 2021 at 11:46, Marcin Wojtas wrote: > > Hi Ard, > > pon., 19 lip 2021 o 17:06 Marcin Wojtas napisa=C5=82(a)= : > > > > Hi Ard, > > > > pon., 19 lip 2021 o 11:54 Ard Biesheuvel napisa=C5=82= (a): > > > > > > On Mon, 19 Jul 2021 at 11:31, Marcin Wojtas wrote: > > > > > > > > BBR 1.0 spec says that _STA is required for each device in DSDT or = SSDT. > > > > Fix that for all platforms with the Marvell SoC's. > > > > > > > > > > Can we fix the BBR instead? If ACPI itself does not require _STA, BBR > > > should not require it either. > > > > > > > > > > I consulted with ARM on the matter. SBBR has requirements of things > > that are otherwise optional in UEFI/ACPI/SMBIOS. Also some OS's may > > require that and I can see those methods in most of the other ACPI > > source files in the edk2-platfoms tree. I think the BBR requirements > > discussions can follow, but it would be great if this change can be > > applied, so that no to block other development. > > > > Do you have any feedback to the patchset and the _STA methods concerns? > Yes. I would like to understand why _STA methods are now mandated by BBR. > > > > > > > > > Signed-off-by: Marcin Wojtas > > > > --- > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 5= 6 +++++++++++++++ > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 7= 6 ++++++++++++++++++++ > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 7= 2 +++++++++++++++++++ > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 1= 2 ++++ > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 5= 6 +++++++++++++++ > > > > 5 files changed, 272 insertions(+) > > > > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsd= t.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > index 345c1e4dd6..88e38efeeb 100644 > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA7K", 3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU1) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU2) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > > > > > Device (AHC0) > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA7K", 3) > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > { > > > > Name (_HID, "MRVL0001") //= _HID: Hardware ID > > > > Name (_CID, "HISI0031") //= _CID: Compatible ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) //= _ADR: Address > > > > Name (_CRS, ResourceTemplate () //= _CRS: Current Resource Settings > > > > { > > > > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > { > > > > Name (_HID, "MRVL0100") //= _HID: Hardware ID > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > { > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsd= t.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > index 91401c74c8..77d3aebaf1 100644 > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU1) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU2) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > > > > > Device (AHC0) > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0001") //= _HID: Hardware ID > > > > Name (_CID, "HISI0031") //= _CID: Compatible ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) //= _ADR: Address > > > > Name (_CRS, ResourceTemplate () //= _CRS: Current Resource Settings > > > > { > > > > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0100") //= _HID: Hardware ID > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0100") //= _HID: Hardware ID > > > > Name (_UID, 0x01) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x01) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > { > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/= Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > > index d26945d933..1ecbd0309c 100644 > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.as= l > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.as= l > > > > @@ -19,21 +19,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU1) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU2) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > > > > > Device (AHC0) > > > > @@ -41,6 +57,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -91,6 +111,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -122,6 +146,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -150,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -169,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -188,6 +224,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -206,6 +246,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0001") //= _HID: Hardware ID > > > > Name (_CID, "HISI0031") //= _CID: Compatible ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) //= _ADR: Address > > > > Name (_CRS, ResourceTemplate () //= _CRS: Current Resource Settings > > > > { > > > > @@ -232,6 +276,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0100") //= _HID: Hardware ID > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -249,6 +297,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "MRVL0101") //= _HID: Hardware ID > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -283,6 +335,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > @@ -322,6 +378,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x01) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > @@ -400,6 +460,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > @@ -420,6 +484,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > > @@ -446,6 +514,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > { > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt= .asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > index 8377b13763..d6619e367b 100644 > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,= "MVEBU ", "CN9131", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,= "MVEBU ", "CN9131", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,= "MVEBU ", "CN9131", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x01) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt= .asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > index d76a2a902b..536df8ab4b 100644 > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "CN9130", 3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU1) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU2) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > Device (CPU3) > > > > { > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HI= D: Hardware ID > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > } > > > > > > > > Device (AHC0) > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > { > > > > 0x01, > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > > Name (_HID, "MRVL0003") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -98,6 +122,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU = ", "CN9130", 3) > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -126,6 +154,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -145,6 +177,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency A= ttribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Reso= urce Settings > > > > { > > > > @@ -163,6 +199,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > { > > > > Name (_HID, "MRVL0001") //= _HID: Hardware ID > > > > Name (_CID, "HISI0031") //= _CID: Compatible ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) //= _ADR: Address > > > > Name (_CRS, ResourceTemplate () //= _CRS: Current Resource Settings > > > > { > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > { > > > > Name (_HID, "MRVL0100") //= _HID: Hardware ID > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, > > > > @@ -211,6 +255,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > Name (_HID, "MRVL0110") //= _HID: Hardware ID > > > > Name (_CCA, 0x01) //= Cache-coherent controller > > > > Name (_UID, 0x00) //= _UID: Unique ID > > > > + Method (_STA) //= _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > @@ -289,6 +337,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > { > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > + Method (_STA) = // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_CRS, ResourceTemplate () > > > > { > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > @@ -315,6 +367,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > > + Method (_STA) // _STA: Device status > > > > + { > > > > + Return (0xF) > > > > + } > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > { > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > -- > > > > 2.29.0 > > > >