From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web10.5980.1620822145453778417 for ; Wed, 12 May 2021 05:22:25 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=TnMkKLFq; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id 884C5613E9 for ; Wed, 12 May 2021 12:22:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1620822144; bh=hS/LUXNtu9jZyO3wttsZZCXZj8Nw14CmevDH06xv9co=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=TnMkKLFq/wlxQdozwOFti0iGNmN4E8iSrZQKk/MGMgdzUGfkDlZLus/lB8GA5Cl7V N/dwb+73klGqhzE7cvQz7ttbOxpZ09rpd7silnbJ/Ae1He9iz2IeLkaqLioA/1uXgI YKFjbTBV49oeJu1JqHp6K2C9tS/0b+8WdseoMLY/sX/kAbwyZJ9cEV11dgdZEqoOnr op3fN00Rt3VuB7leGTmYDSNhNgtM3aB4v4JvWwzA1vm5dzfungo7vS0m7zaHdGgkYw 1NWIpvgilFiOcRzx4qY54jPKnIGUOpH6Yo0Z2bk2pXAZ9PCIZFuoiiSpKJ/DVKh9+Y koVPsg4kK4Y/A== Received: by mail-ot1-f41.google.com with SMTP id 69-20020a9d0a4b0000b02902ed42f141e1so10175221otg.2 for ; Wed, 12 May 2021 05:22:24 -0700 (PDT) X-Gm-Message-State: AOAM530lqe2MUUk0cYW35ioMFjwfziqGb3YsYYQQgLaZwTIhDlpNOrGr qLQdXoOwo3AybWA1zqDd0dI2tr7Yz05G4qLm/kY= X-Google-Smtp-Source: ABdhPJwWWSQxJZmqfmmBmhDLkeYeLD2PQvSRcw8bnDevR2sK+o+aH6kkmSmRX82Lf1gXZmx6TlbxUlOVIGKUkUr6OA0= X-Received: by 2002:a9d:69c5:: with SMTP id v5mr29982258oto.108.1620822143688; Wed, 12 May 2021 05:22:23 -0700 (PDT) MIME-Version: 1.0 References: <20210511224149.864718-1-jeremy.linton@arm.com> <20210511224149.864718-2-jeremy.linton@arm.com> In-Reply-To: From: "Ard Biesheuvel" Date: Wed, 12 May 2021 14:22:12 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/2] Platform/Raspberrypi: Update DMA constants based on SOC revision To: Pete Batard Cc: Jeremy Linton , edk2-devel-groups-io , Ard Biesheuvel , Samer El-Haj-Mahmoud , Andrei Warkentin Content-Type: text/plain; charset="UTF-8" On Wed, 12 May 2021 at 13:19, Pete Batard wrote: > > Two minor notes below: > > On 2021.05.11 23:41, Jeremy Linton wrote: > > The newer BCM2711 SoC's don't have a DMA constraint on the emmc2 > > controller. So we don't need to do the 1G translation. Lets > > allow the AML to detect the SoC revision and return a different > > _DMA resource. > > > > Signed-off-by: Jeremy Linton > > --- > > Platform/RaspberryPi/AcpiTables/Emmc.asl | 39 +++++++++++++++++++++- > > .../Bcm27xx/Include/IndustryStandard/Bcm2711.h | 2 ++ > > 2 files changed, 40 insertions(+), 1 deletion(-) > > > > diff --git a/Platform/RaspberryPi/AcpiTables/Emmc.asl b/Platform/RaspberryPi/AcpiTables/Emmc.asl > > index 23febe37b4..c6691e81dc 100644 > > --- a/Platform/RaspberryPi/AcpiTables/Emmc.asl > > +++ b/Platform/RaspberryPi/AcpiTables/Emmc.asl > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > +#include > > > > #include "AcpiTables.h" > > > > @@ -31,7 +32,8 @@ DefinitionBlock (__FILE__, "SSDT", 2, "RPIFDN", "RPI4EMMC", 2) > > Return (^RBUF) > > } > > > > - Name (_DMA, ResourceTemplate() { > > + // Translated DMA region for < C0 > > Even if the code makes it clear that we're testing the chip revision to > decide what region to return, I would prefer if we had "for pre C0 > revisions of the SoC" instead of "for < C0", as I suspect people who > read this too quickly, and have no idea what C0, refers to may think > we're talking about a DMA address boundary or something. > > > + Name (DMTR, ResourceTemplate() { > > QWordMemory (ResourceProducer, > > , > > MinFixed, > > @@ -48,6 +50,41 @@ DefinitionBlock (__FILE__, "SSDT", 2, "RPIFDN", "RPI4EMMC", 2) > > ) > > }) > > > > + // Non translated DMA region for >= C0 > > Same as above: "for post C0 revisions of the SoC" > > > + Name (DMNT, ResourceTemplate() { > > + QWordMemory (ResourceProducer, > > + , > > + MinFixed, > > + MaxFixed, > > + NonCacheable, > > + ReadWrite, > > + 0x0, > > + 0x0000000000000000, // MIN > > + 0x000000FFFFFFFFFF, // MAX > > + 0x0000000000000000, // TRA > > + 0x0000010000000000, // LEN > > + , > > + , > > + ) > > + }) > > + > > + Method (_DMA, 0x0, Serialized) > > + { > > + OperationRegion (CHPR, SystemMemory, ID_CHIPREV, 0x4) > > + Field (CHPR, DWordAcc, NoLock, Preserve) { > > + SOCI, 32 > > + } > > + > > + if ((SOCI & 0xFF) >= 0x20) > > + { > > + return (^DMNT); > > + } > > + else > > + { > > + return (^DMTR); > > + } > > + } > > + > > // emmc2 Host Controller. (brcm,bcm2711-emmc2) > > Device (SDC3) > > { > > diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2711.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2711.h > > index 86906b2438..8a69128d11 100644 > > --- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2711.h > > +++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2711.h > > @@ -88,4 +88,6 @@ > > > > #define THERM_SENSOR 0xfd5d2200 > > > > +#define ID_CHIPREV 0xfc404000 > > + > > #endif /* BCM2711_H__ */ > > > > With the comment changes, if agreed, applicable during integration: > Reviewed-by: Pete Batard Thanks Pete. I have pushed these 2 patches as e1efa61c33f7..09c5ab125b61 with the above suggestion applied.