From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web12.10234.1629640568846512461 for ; Sun, 22 Aug 2021 06:56:08 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=LqJqpVT+; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id 124D76126A for ; Sun, 22 Aug 2021 13:56:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1629640568; bh=XKSOKdwTPyqbtxOWYhYqcD7uINWTvThweUlyZ43fDoE=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=LqJqpVT+DwBVgjyi3T1MNiocCE6RUWPbirNxFP0prodByrMNFhukky5C/cFPDftEZ tcaGHFcf2CqWLD7rs6j1DhD/1ahU6qgT4s5NFfKQjzs5zhLq9xKOj+JKOmPVEaCFl4 K+ujs3loZVAUdGykxT+E3oXjyj10otN7en30L3VtaPGYQUdxl0p65HtuDuEJ3QMCgo mL+Z9FuD3EMzb7EXGcq3X2sNYwOTUZteAeE2i9tBPtmuq5efF1Ir0mNdR+ZB9wDMVI 81lhLgFz8DzyS7hiX2ozDunoa7OXtM76dE6cIIhpS1fMuTPIHHxSd0wRulHQzomgtc 6Y/nhSNZgBTjQ== Received: by mail-oo1-f52.google.com with SMTP id z1-20020a4a2241000000b0028e8dfb83b4so1737549ooe.13 for ; Sun, 22 Aug 2021 06:56:08 -0700 (PDT) X-Gm-Message-State: AOAM530GXABf802LC7qHzqxuuVlyGO+16Q3EBzxAYUl7/tyM12UV3Zm3 /u/IKV5ZXrdm5oCPDgWyNLIF7xqcTDzwmfgGp7I= X-Google-Smtp-Source: ABdhPJx5sGrCFK9di/12u1IQPtX0Ifmjlzi9hCK4hMYbO3wpEPFcbFbK9MakKqaQARpeGXcsTUe6PLvagM7HYOSR+wg= X-Received: by 2002:a4a:e923:: with SMTP id a3mr22657789ooe.45.1629640567414; Sun, 22 Aug 2021 06:56:07 -0700 (PDT) MIME-Version: 1.0 References: <20210820041619.87248-1-jeremy.linton@arm.com> <7d39c23-6578-6bb9-ab5f-9d242d7ff42d@invisible.ca> In-Reply-To: <7d39c23-6578-6bb9-ab5f-9d242d7ff42d@invisible.ca> From: "Ard Biesheuvel" Date: Sun, 22 Aug 2021 15:55:56 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 0/7] RPi4: Enable ACPI PCIe conduit To: Jared McNeill Cc: Samer El-Haj-Mahmoud , Jeremy Linton , "devel@edk2.groups.io" , "pete@akeo.ie" , "ardb+tianocore@kernel.org" , "Andrei Warkentin (awarkentin@vmware.com)" , Sunny Wang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 21 Aug 2021 at 20:59, Jared McNeill wrote: > > Works as expected on NetBSD 10 + Raspberry Pi 4 B (4GB). > > Tested-by: Jared McNeill > Pushed as 0efab5febe78..46026ad759b7 thanks all, > > On Fri, 20 Aug 2021, Samer El-Haj-Mahmoud wrote: > > > +Jared to review/test the series with NetBSD 10, which supports the DEN= 0115 interface (https://www.netbsd.org/changes/changes-10.0.html#port-evbar= m) > > > > > > > >> -----Original Message----- > >> From: Jeremy Linton > >> Sent: Friday, August 20, 2021 12:16 AM > >> To: devel@edk2.groups.io > >> Cc: pete@akeo.ie; ardb+tianocore@kernel.org; Andrei Warkentin > >> (awarkentin@vmware.com) ; Sunny Wang > >> ; Samer El-Haj-Mahmoud >> Mahmoud@arm.com>; Jeremy Linton > >> Subject: [PATCH v3 0/7] RPi4: Enable ACPI PCIe conduit > >> > >> A new Arm standard DEN0115A specifies how platforms that don't have > >> standard ECAM can use the firmware to handle config read/write > >> operations. This is mostly implemented in TFA but UEFI needs to assure > >> that there is a description of the root complex in the ACPI namespace. > >> > >> This set adds that description based on a new menu item which toggles > >> between XHCI platform description and PCIe via a BDS menu selection on > >> the RPi4. The CM4 is really the platform that needs this as it has a > >> PCIe slot. On that platform PCIe is enabled by default. > >> > >> v2->v3: > >> Remove ACPI0004 container around PCI root bridge along with some > >> whitespace/tweaks to the Pci.asl file. > >> Add Linux quirk _DSD patch at the end. > >> > >> v1->v2: > >> Use global shared interrupts in PCI PRT which is a pretty > >> significant simplification. > >> Modify bus max to use the secondary side of the root port for > >> enforcing device limits > >> Various other AML cleanups per Ard (drop redundant _DMA, bump UID > >> to make it unique, etc) > >> Break link status move into its own patch > >> MADT->MCFG typos in various comments > >> Commit message tweaking > >> > >> Jeremy Linton (7): > >> Platform/RaspberryPi: Add XHCI/PCI selection menu > >> Platform/RaspberryPi: Break XHCI into its own SSDT > >> Platform/RaspberryPi: Add PCIe SSDT > >> Silicon/Broadcom/Bcm27xx: Relax PCIe device restriction > >> Silicon/Broadcom/Bcm27xx: Move linkup check into the cfg accessor > >> Platform/RaspberryPi: Enable NVMe boot on CM4 > >> Platform/RaspberryPi: Add Linux quirk support > >> > >> Platform/RaspberryPi/AcpiTables/AcpiTables.inf | 4 + > >> Platform/RaspberryPi/AcpiTables/Dsdt.asl | 3 - > >> Platform/RaspberryPi/AcpiTables/Pci.asl | 168 > >> +++++++++++++++++++++ > >> Platform/RaspberryPi/AcpiTables/Xhci.asl | 35 +++-- > >> Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 56 +++++++ > >> .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 + > >> .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 + > >> .../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 +++ > >> Platform/RaspberryPi/Include/ConfigVars.h | 4 + > >> Platform/RaspberryPi/RPi3/RPi3.dsc | 6 + > >> Platform/RaspberryPi/RPi4/RPi4.dsc | 13 ++ > >> Platform/RaspberryPi/RPi4/RPi4.fdf | 5 + > >> Platform/RaspberryPi/RaspberryPi.dec | 1 + > >> .../Bcm2711PciHostBridgeLibConstructor.c | 5 - > >> .../Library/Bcm2711PciSegmentLib/PciSegmentLib.c | 28 +++- > >> 15 files changed, 323 insertions(+), 28 deletions(-) > >> create mode 100644 Platform/RaspberryPi/AcpiTables/Pci.asl > >> > >> -- > >> 2.13.7 > > > > IMPORTANT NOTICE: The contents of this email and any attachments are co= nfidential and may also be privileged. If you are not the intended recipien= t, please notify the sender immediately and do not disclose the contents to= any other person, use it for any purpose, or store or copy the information= in any medium. Thank you. > >