From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web08.9882.1633702736689610539 for ; Fri, 08 Oct 2021 07:18:56 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=SGFlQLsB; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id 41DBA610E7 for ; Fri, 8 Oct 2021 14:18:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633702736; bh=RFYMHEb4kcXC3F6Fao52JNbRk2ITU9bM5CGYUL56srM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=SGFlQLsBAfSSVOOwUgRuacXTyIH3RZ4Sv7WqDZokxy1ZL0lOlSPQIHFLsPI3eEwdr Z0W4gzwfY9V+yCG+DSnC3DnhKXO24m/jMZYTMJ1YdE3hHUYqHJ70Kwf4/vhgRzBmn3 MaqG1Yk6hyXoUZH/lgGxtCnxcKOd7b+jILnXUflXtZPGlXz5ZZsoSb5tOAg6uCvcTL 7Fw9dQY7ERCWovsBx6cGsG4eDftkt3IWUisFCok7sEo3craRZIR6b84H2o3RTEO4kU irYolx/MpyKkLyd7odjT+XlOSaS6TH406/glpxkay9GLNIxuy5jZFyx7UMplqdF+Se vc9Kpubjji7fg== Received: by mail-ot1-f43.google.com with SMTP id g62-20020a9d2dc4000000b0054752cfbc59so11949776otb.1 for ; Fri, 08 Oct 2021 07:18:56 -0700 (PDT) X-Gm-Message-State: AOAM532/B6VlZQ6HNQtJWFaQDBBKrEd1HtPCHZ8EKNeP+gM27iZ/HJVt 0kHBuh+Whqqiz+Fez6+rmUkcPJTmXRkAYEPkxM0= X-Google-Smtp-Source: ABdhPJzKRrkC7GSbm7XLpmt/TQmyiJRQ3aRdsVHAPVtOeCp3bW/P8QSuFnvlJvJh0Nzudu13yvDG8B2gKl7ipdBZIpE= X-Received: by 2002:a9d:7b48:: with SMTP id f8mr9072287oto.112.1633702735601; Fri, 08 Oct 2021 07:18:55 -0700 (PDT) MIME-Version: 1.0 References: <20211008103425.1810992-1-leif@nuviainc.com> In-Reply-To: <20211008103425.1810992-1-leif@nuviainc.com> From: "Ard Biesheuvel" Date: Fri, 8 Oct 2021 16:18:44 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH edk2-platforms 1/1] Silicon/Qemu: don't advertise GICC legacy mmio interface in SbsaQamu MADT To: Leif Lindholm Cc: edk2-devel-groups-io , Ard Biesheuvel , Graeme Gregory , Radoslaw Biernacki Content-Type: text/plain; charset="UTF-8" On Fri, 8 Oct 2021 at 12:34, Leif Lindholm wrote: > > The MADT GICC structure contains the field PhysicalBaseAddress, which > is needed for a GICv1/v2 implementation, or to indicate legacy > compatibility in modern GICs. > > Linux commit 9739f6ef053f1, included in v5.12, adds a warning message > when this field is populated but invalid: > [Firmware Bug]: CPU interface incapable of MMIO access > > As it happens, we currently initialize this to PcdGicDistributorBase > instead of PcdGicInterruptInterfaceBase, and as a result we now trigger > this warning. > > Since this is an SBSA reference implementation, and legacy GIC support > has never worked for this port, set the field to 0. > > Signed-off-by: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Graeme Gregory > Cc: Radoslaw Biernacki Acked-by: Ard Biesheuvel > --- > Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > index b8901030ecd0..dbc5e9475358 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > @@ -71,7 +71,7 @@ AddMadtTable ( > 0, /* Mpidr */ > EFI_ACPI_6_0_GIC_ENABLED, /* Flags */ > SBSAQEMU_MADT_GIC_PMU_IRQ, /* PMU Irq */ > - FixedPcdGet32 (PcdGicDistributorBase), /* PhysicalBaseAddress */ > + 0, /* PhysicalBaseAddress */ > SBSAQEMU_MADT_GIC_VBASE, /* GicVBase */ > SBSAQEMU_MADT_GIC_HBASE, /* GicHBase */ > 25, /* GsivId */ > -- > 2.30.2 >