From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.10900.1672919196234356453 for ; Thu, 05 Jan 2023 03:46:36 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QTCTb147; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 28508B81AB2 for ; Thu, 5 Jan 2023 11:46:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C85EAC433D2 for ; Thu, 5 Jan 2023 11:46:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1672919192; bh=h2Hp3S/qkgMvk3CzYpXj6OdKiVMS6eCWdF1vdraApEg=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=QTCTb147knjCPvQt3B+L8pAqZQiWNmbywm5TYi5wBBUxfE2FQO65t72t/xNrwktQi 6pw3/8wzaik4KLBl8m6p4ExE9Vntglg+5b9IGk0yBYJyqDfkF9chpy9jWa7pbSyHI+ UFUKaXjSCyMKcXXmDTnkz891irnexjqNy8/yM1lN+i6h4zoYVAzBt2T4sCPkAd53mU aWV+ZlE6v5cmdqOliH/j9hjmq9l6IZJJAT6/B8zA1fbspCVjYASa7Nt28CStRIbYBm H1+SkAAJZHBWJFtTh/gaBRZ9s0ckRw2cMOyMGzR0mfAi4XJebl3yYrNMeUL+yKEs7V XipMNK4fzZmIQ== Received: by mail-lf1-f42.google.com with SMTP id j17so45234503lfr.3 for ; Thu, 05 Jan 2023 03:46:32 -0800 (PST) X-Gm-Message-State: AFqh2kptJr7tHhoZNp82Nwd8QjS3tdZ2lNLKwYwAdv/EsbyNqRamz83r 372TTDQwbs6K7YINn7y0cYESiClMbyiEEQzR3bg= X-Google-Smtp-Source: AMrXdXuUtOJIFdQ5xivAGJdCFbHIqaLTbC4ZC12zlj+jHnDELaZMV2fGniCNG3DbToRhJPVGjTlZs+lkGYiI1lcdUV8= X-Received: by 2002:ac2:4a72:0:b0:4b6:f37c:c123 with SMTP id q18-20020ac24a72000000b004b6f37cc123mr3558873lfp.539.1672919190830; Thu, 05 Jan 2023 03:46:30 -0800 (PST) MIME-Version: 1.0 References: <20230104172255.1211768-1-ardb@kernel.org> In-Reply-To: <20230104172255.1211768-1-ardb@kernel.org> From: "Ard Biesheuvel" Date: Thu, 5 Jan 2023 12:46:19 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] ArmVirtPkg/ArmVirtQemu: Avoid early ID map on ThunderX To: devel@edk2.groups.io Cc: dann.frazier@canonical.com Content-Type: text/plain; charset="UTF-8" On Wed, 4 Jan 2023 at 18:23, Ard Biesheuvel wrote: > > The early ID map used by ArmVirtQemu uses ASID scoped non-global > mappings, as this allows us to switch to the permanent ID map seamlessly > without the need for explicit TLB maintenance. > > However, this triggers a known erratum on ThunderX, which does not > tolerate non-global mappings that are executable at EL1, as this appears > to result in I-cache corruption. (Linux disables the KPTI based Meltdown > mitigation on ThunderX for the same reason) > > So work around this, by detecting the CPU implementor and part number, > and proceeding without the early ID map if a ThunderX CPU is detected. > > Note that this requires the C code to be built with strict alignment > again, as we may end up executing it with the MMU and caches off. > > Signed-off-by: Ard Biesheuvel > --- > ArmVirtPkg/ArmVirtQemu.dsc | 6 ++++++ > ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 18 ++++++++++++++++++ > 2 files changed, 24 insertions(+) > > diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc > index f77443229e8e..340b36f69c2c 100644 > --- a/ArmVirtPkg/ArmVirtQemu.dsc > +++ b/ArmVirtPkg/ArmVirtQemu.dsc > @@ -31,6 +31,7 @@ [Defines] > DEFINE SECURE_BOOT_ENABLE = FALSE > DEFINE TPM2_ENABLE = FALSE > DEFINE TPM2_CONFIG_ENABLE = FALSE > + DEFINE CAVIUM_ERRATUM_27456 = FALSE > > # > # Network definition > @@ -117,7 +118,12 @@ [LibraryClasses.common.UEFI_DRIVER] > UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf > > [BuildOptions] > +!if $(CAVIUM_ERRATUM_27456) == TRUE > + GCC:*_*_AARCH64_CC_XIPFLAGS = -mno-strict-align This is wrong - this should be '-mstrict-align' > + GCC:*_*_AARCH64_PP_FLAGS = -DCAVIUM_ERRATUM_27456 > +!else > GCC:*_*_AARCH64_CC_XIPFLAGS == > +!endif > > !include NetworkPkg/NetworkBuildOptions.dsc.inc > > diff --git a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S > index 05ccc7f9f043..962f1ba3a4d7 100644 > --- a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S > +++ b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S > @@ -44,8 +44,26 @@ > > > ASM_FUNC(ArmPlatformPeiBootAction) > +#ifdef CAVIUM_ERRATUM_27456 > + /* > + * On Cavium ThunderX, using non-global mappings that are executable at EL1 > + * results in I-cache corruption. So just avoid the early ID mapping there. > + * > + * MIDR implementor 0x43 > + * MIDR part numbers 0xA1 0xA2 > + */ > + mrs x0, midr_el1 // read the MIDR into X0 > + ubfx x1, x0, #6, #10 // grab part number bits [11:2] > + ubfx x0, x0, #24, #8 // grab implementor id > + mov x2, #0xA0 >> 2 > + cmp x0, #0x43 // compare implementor id > + ccmp x1, x2, #0, eq // compare part# bits [11:2] > + b.eq .Lreturn > +#endif > + > mrs x0, CurrentEL // check current exception level > tbz x0, #3, 0f // bail if above EL1 > +.Lreturn: > ret > > 0:mov_i x0, mairval > -- > 2.39.0 >