From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id BD19D941398 for ; Thu, 21 Dec 2023 10:14:07 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=jetYz/nOUNWV8NhH95QFV8NTxSX63uMokB845/rAbZc=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1703153646; v=1; b=GYPJiKkU8PGCS1ChR8Tbpih8CXQj/I1aggtsJOaV+H1MTtOwgkTS+/hBsRoFCKtTzZGk2sFu QQ5CBGhzYH1wyU6I97z0y0MLScy3/8b3gb/FM78qz0wfac1AGyMvj/wYfHbOSHrc+1BnyqJyaNv zzR0gw5xFm/7KOkGO3412H20= X-Received: by 127.0.0.2 with SMTP id HutXYY7687511xmpVoPqMseM; Thu, 21 Dec 2023 02:14:06 -0800 X-Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by mx.groups.io with SMTP id smtpd.web10.48666.1703153645051813854 for ; Thu, 21 Dec 2023 02:14:05 -0800 X-Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 0352ACE1EF8 for ; Thu, 21 Dec 2023 10:14:02 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id 066A2C433CD for ; Thu, 21 Dec 2023 10:14:01 +0000 (UTC) X-Received: by mail-lj1-f179.google.com with SMTP id 38308e7fff4ca-2cc9d109daeso5388051fa.0 for ; Thu, 21 Dec 2023 02:14:00 -0800 (PST) X-Gm-Message-State: O30HBcIImyvqSC2AGRR8BeKZx7686176AA= X-Google-Smtp-Source: AGHT+IG6VpgZULn3cqqOY7RWRbwCqe4bHJNUJWLKp3ImOy6w+gpOWme4cv0ldBN10Kd0keMcWbMQJp+qTEYLwWE5OIY= X-Received: by 2002:a05:6512:281:b0:50e:2cc8:4f0c with SMTP id j1-20020a056512028100b0050e2cc84f0cmr3489578lfp.99.1703153639120; Thu, 21 Dec 2023 02:13:59 -0800 (PST) MIME-Version: 1.0 References: <1089e51f1e60222d591d92de518e664be7843123.1703099891.git.jake@nvidia.com> <739beb9c-a10d-4dec-b228-3b064bc1e358@bsdio.com> In-Reply-To: <739beb9c-a10d-4dec-b228-3b064bc1e358@bsdio.com> From: "Ard Biesheuvel" Date: Thu, 21 Dec 2023 11:13:48 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH v2] BaseTools/GenFw: Correct offset when relocating an ADR To: devel@edk2.groups.io, rebecca@bsdio.com Cc: Jake Garver , gaoliming@byosoft.com.cn, bob.c.feng@intel.com, yuwei.chen@intel.com, ardb+tianocore@kernel.org, pedro.falcato@gmail.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=GYPJiKkU; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Wed, 20 Dec 2023 at 22:26, Rebecca Cran wrote: > > Reviewed-by: Rebecca Cran > Merged as #5183 Thanks all > > On 12/20/2023 12:31 PM, Jake Garver wrote: > > In the R_AARCH64_ADR_GOT_PAGE case on AARCH64, we may encounter an ADR > > instead of an ADRP when the toolchain is working around Cortex-A53 > > erratum #843419. If that's the case, be sure to calculate the offset > > appropriately. > > > > This resolves an issue experienced when building a StandaloneMm image > > with stack protection enabled on GCC compiled with > > "--enable-fix-cortex-a53-843419". This scenario sometimes generates an > > ADR with a R_AARCH64_ADR_GOT_PAGE relocation. > > > > In this scenario, the following code is being generated by the > > toolchain: > > > > # Load to set the stack canary > > 2ffc: 10028020 adr x0, 8000 > > 3008: f940d400 ldr x0, [x0, #424] > > > > # Load to check the stack canary > > 30cc: b0000020 adrp x0, 8000 > > 30d0: f940d400 ldr x0, [x0, #424] > > > > GenFw rewrote that to: > > > > # Load to set the stack canary > > 2ffc: 10000480 adr x0, 0x308c > > 3008: 912ec000 add x0, x0, #0xbb0 > > > > # Load to check the stack canary > > 30cc: f0000460 adrp x0, 0x92000 > > 30d0: 912ec000 add x0, x0, #0xbb0 > > > > Note that we're now setting the stack canary from the wrong address, > > resulting in an erroneous stack fault. > > > > After this fix, the offset will be calculated correctly for an ADR and > > the stack canary is set correctly. > > > > Signed-off-by: Jake Garver > > --- > > > > Notes: > > v2: Implement approach proposed by Ard Biesheuvel. > > - title changed to: Correct offset when relocating an ADR > > v1: Original title: Change opcode when converting ADR to ADRP > > > > BaseTools/Source/C/GenFw/Elf64Convert.c | 22 +++++++++++++++++++++- > > 1 file changed, 21 insertions(+), 1 deletion(-) > > > > diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c > > index 9911db65af..9d04fc612e 100644 > > --- a/BaseTools/Source/C/GenFw/Elf64Convert.c > > +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c > > @@ -1562,7 +1562,27 @@ WriteSections64 ( > > // subsequent LDR instruction (covered by a R_AARCH64_LD64_GOT_LO12_NC > > // relocation) into an ADD instruction - this is handled above. > > // > > - Offset = (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12; > > + // In order to handle Cortex-A53 erratum #843419, the GCC toolchain > > + // may convert an ADRP instruction at the end of a page (0xffc > > + // offset) into an ADR instruction. If so, be sure to calculate the > > + // offset for an ADR instead of ADRP. > > + // > > + if ((*(UINT32 *)Targ & BIT31) == 0) { > > + // > > + // Calculate the offset for an ADR. > > + // > > + Offset = (Sym->st_value & ~0xfff) - Rel->r_offset; > > + if (Offset < -0x100000 || Offset > 0xfffff) { > > + Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s due to its size (> 1 MB), unable to relocate ADR.", > > + mInImageName); > > + break; > > + } > > + } else { > > + // > > + // Calculate the offset for an ADRP. > > + // > > + Offset = (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12; > > + } > > > > *(UINT32 *)Targ &= 0x9000001f; > > *(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29); > > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112806): https://edk2.groups.io/g/devel/message/112806 Mute This Topic: https://groups.io/mt/103287393/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-