Re: [PATCH edk2-stable202305] ArmPkg/ArmMmuLib: Add missing ISB after page table update

["Ard Biesheuvel" <ardb@kernel.org>]

Any objections to this? If not, I will push it later today. Thanks.



On Sat, 20 May 2023 at 11:20, Ard Biesheuvel <ardb@kernel.org> wrote:
>
> The helper that updates live page table entries writes a zero entry,
> invalidates the covered address range from the TLBs, and finally writes
> the actual entry. This ensures that no TLB conflicts can occur.
>
> Writing the final entry needs to complete before any translations can be
> performed, as otherwise, the zero entry, which describes an invalid
> translation, may be observed by the page table walker, resulting in a
> translation fault. For this reason, the final write is followed by a DSB
> barrier instruction.
>
> However, this barrier will not stall the pipeline, and instruction
> fetches may still hit this invalid translation, as has been observed and
> reported by Oliver. To ensure that the new translation is fully active
> before returning from this helper, we have to insert an ISB barrier as
> well.
>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Reported-by: Oliver Steffen <osteffen@redhat.com>
> Tested-by: Oliver Steffen <osteffen@redhat.com>
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
>  ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> index 887439bc042f0f16..1f0d8057926933d7 100644
> --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> @@ -65,6 +65,7 @@
>    // write updated entry
>    str   x1, [x0]
>    dsb   nshst
> +  isb
>
>  .L2_\@:
>    .endm
> --
> 2.39.2
>