From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web10.31184.1688386524899683309 for ; Mon, 03 Jul 2023 05:15:25 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PD63ht+D; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 479CD60F10 for ; Mon, 3 Jul 2023 12:15:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AEA73C433CD for ; Mon, 3 Jul 2023 12:15:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1688386523; bh=N7YrHeL1W1Zrek938ZlMke0bKY/xbS2hHXgCSSMkqeg=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=PD63ht+Di+OGvBFtm0RGdt/WszPH5jNC+yWjGd1mLGcI9KM5jEDOVrFY+d0I7tn0n Q0Du8YKCilBCXGdIxNCB8cHGg6952i15aYgddJ2Ay3YbhluUO21zJUUKRdhqlY8JDW +BEsHziLMzERMEYiTHvHpAfUu0caSV401rIUF7n3wzsaz4udUdS+ZN0RKSjuaouDP0 Bh4YSnoXUv5w5Y+N4lM1gjDkr8mXaLcVur7wXyVe6ZWeXTYow50CmfCueWh0m0zwx5 8EjynBbCawKcil/Jn8tB6yW72KaQhHvqo64VoqNM7WBHYwNJWpA9Tg2pay9rLzThJ2 P/uiDASPNnTCA== Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-4fba8f2197bso3550384e87.3 for ; Mon, 03 Jul 2023 05:15:23 -0700 (PDT) X-Gm-Message-State: ABy/qLbSHWejRhjgNY9h/c8m2/w1IlDzDr3UkSUSTKDqT52vn6yi/V4v XkSLCjvdso9hwv3XI6g8rPuA3K/Ag65Atn2TfWs= X-Google-Smtp-Source: APBJJlHIHIiI3h6gjMhAf/lJ7FO2cblJj0s6iCPrwol/C8vDj8fE9QmkL9qKT+uUdvZo3HdcTs8fg77ZLhmKLsMh9do= X-Received: by 2002:a05:6512:2344:b0:4fb:96f3:2f4 with SMTP id p4-20020a056512234400b004fb96f302f4mr7285081lfu.51.1688386521736; Mon, 03 Jul 2023 05:15:21 -0700 (PDT) MIME-Version: 1.0 References: <20230703080831.51075-1-sunilvl@ventanamicro.com> In-Reply-To: <20230703080831.51075-1-sunilvl@ventanamicro.com> From: "Ard Biesheuvel" Date: Mon, 3 Jul 2023 14:15:10 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 0/4] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support To: Sunil V L Cc: devel@edk2.groups.io, Rebecca Cran , Liming Gao , Bob Feng , Yuwei Chen , Ard Biesheuvel , Jiewen Yao , Jordan Justen , Andrei Warkentin , Heinrich Schuchardt Content-Type: text/plain; charset="UTF-8" On Mon, 3 Jul 2023 at 10:08, Sunil V L wrote: > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4478 > > This series adds support for building RiscVVirtQemu EDK2 using > CLANGDWARF toolchain. Adding this support helps people to use > the same toolchain to build EDK2 for different architectures. > > Cc: Rebecca Cran > Cc: Liming Gao > Cc: Bob Feng > Cc: Yuwei Chen > Cc: Ard Biesheuvel > Cc: Jiewen Yao > Cc: Jordan Justen > Cc Gerd Hoffmann > Cc: Andrei Warkentin > Cc: Heinrich Schuchardt > > Sunil V L (4): > OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modules > OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directives > BaseTools/tools_def: Add CLANGDWARF support for RISC-V > OvmfPkg/RiscVVirt: Update README for CLANGDWARF support > This looks good to me, although I am not an expert when it comes to RISC-V specifics Acked-by: Ard Biesheuvel Thanks a lot for this work - it will surely make my life a bit easier