From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web08.25931.1626688497298859761 for ; Mon, 19 Jul 2021 02:54:57 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fJwFb0He; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id 7EAB3611AE for ; Mon, 19 Jul 2021 09:54:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1626688496; bh=mIenR9O27ClPybttKQGC2XderJ6ocvbc8b+NWfJs8O0=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=fJwFb0HerSCR6zNqut4WU83ba7v0jLkElIwaJFAJGAefOTjoSPb3qakNkn8t9dJb1 GfdPZ1aQwznXBNUXGXthJWtMkH3Y54fcissNGOUbuFFgDI4eaGEsGH42DjASYyQx2Q rPgGFf9SItN3vuUSnbKO2G+GfmR+1OVlnyjCm1RMr+wZUrGGOf4v/N/MMgNKWJ2Kv1 MoPja/CPucmCHZn1+Bx7THSOLwpcuH+zKQktcjVWvdn4dn1I2E6G+jd20AMMeWlbIc n9YtG8kt9xjMlmvl9Ah86iekauHznvAb9rTBDHWhvGS1GG4Jxgh50rJJzBHK89K0QV 2j7Xum9nryGAA== Received: by mail-oi1-f182.google.com with SMTP id s23so4373020oiw.12 for ; Mon, 19 Jul 2021 02:54:56 -0700 (PDT) X-Gm-Message-State: AOAM533O3lc+PR7Ip2LfhKromzQewTbd6ntOlZ3uPwiDDUpAUxDhdN1t zWbimsA2xlSYas4lk5Ut8U10KfNJl1vcsqCECoU= X-Google-Smtp-Source: ABdhPJwY1ptfU/G18SsIfnty4JuCY4aECbK5ZVqM1m5Pmb/HCaMFrNNH1Vy4Ye02c2iUKYt9C5hnCAafKJDqMVuadgs= X-Received: by 2002:aca:5a04:: with SMTP id o4mr16895519oib.33.1626688495503; Mon, 19 Jul 2021 02:54:55 -0700 (PDT) MIME-Version: 1.0 References: <20210719093015.1490932-1-mw@semihalf.com> <20210719093015.1490932-3-mw@semihalf.com> In-Reply-To: <20210719093015.1490932-3-mw@semihalf.com> From: "Ard Biesheuvel" Date: Mon, 19 Jul 2021 11:54:44 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables To: Marcin Wojtas , Samer El-Haj-Mahmoud Cc: edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , upstream@semihalf.com, Jon Nettleton Content-Type: text/plain; charset="UTF-8" On Mon, 19 Jul 2021 at 11:31, Marcin Wojtas wrote: > > BBR 1.0 spec says that _STA is required for each device in DSDT or SSDT. > Fix that for all platforms with the Marvell SoC's. > Can we fix the BBR instead? If ACPI itself does not require _STA, BBR should not require it either. > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 +++++++++++++++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 76 ++++++++++++++++++++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 72 +++++++++++++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 12 ++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 56 +++++++++++++++ > 5 files changed, 272 insertions(+) > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > index 345c1e4dd6..88e38efeeb 100644 > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x000) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU1) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x001) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU2) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x100) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x101) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > > Device (AHC0) > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "MRVL0002") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "MRVL0004") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > { > Name (_HID, "MRVL0001") // _HID: Hardware ID > Name (_CID, "HISI0031") // _CID: Compatible ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > { > Name (_HID, "MRVL0100") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3) > Name (_SEG, 0x00) // _SEG: PCI Segment > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_PRT, Package () // _PRT: PCI Routing Table > { > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > index 91401c74c8..77d3aebaf1 100644 > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x000) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU1) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x001) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU2) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x100) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x101) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > > Device (AHC0) > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0002") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0004") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x02) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0001") // _HID: Hardware ID > Name (_CID, "HISI0031") // _CID: Compatible ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0100") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0100") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_SEG, 0x00) // _SEG: PCI Segment > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_PRT, Package () // _PRT: PCI Routing Table > { > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > index d26945d933..1ecbd0309c 100644 > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > @@ -19,21 +19,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x000) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU1) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x001) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU2) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x100) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x101) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > > Device (AHC0) > @@ -41,6 +57,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -91,6 +111,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0002") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -122,6 +146,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0004") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -150,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -169,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -188,6 +224,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x02) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -206,6 +246,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0001") // _HID: Hardware ID > Name (_CID, "HISI0031") // _CID: Compatible ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -232,6 +276,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0100") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -249,6 +297,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "MRVL0101") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -283,6 +335,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > @@ -322,6 +378,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > @@ -400,6 +460,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > @@ -420,6 +484,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > @@ -446,6 +514,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3) > Name (_SEG, 0x00) // _SEG: PCI Segment > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_PRT, Package () // _PRT: PCI Routing Table > { > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > index 8377b13763..d6619e367b 100644 > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x02) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x01) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > index d76a2a902b..536df8ab4b 100644 > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x000) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU1) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x001) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU2) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x100) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > Device (CPU3) > { > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID > Name (_UID, 0x101) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > } > > Device (AHC0) > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "LNRO001E") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CLS, Package (0x03) // _CLS: Class Code > { > 0x01, > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "MRVL0003") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -98,6 +122,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "MRVL0004") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -126,6 +154,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -145,6 +177,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "PNP0D10") // _HID: Hardware ID > Name (_UID, 0x01) // _UID: Unique ID > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -163,6 +199,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > { > Name (_HID, "MRVL0001") // _HID: Hardware ID > Name (_CID, "HISI0031") // _CID: Compatible ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings > { > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > { > Name (_HID, "MRVL0100") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, > @@ -211,6 +255,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_HID, "MRVL0110") // _HID: Hardware ID > Name (_CCA, 0x01) // Cache-coherent controller > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > @@ -289,6 +337,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > { > Name (_HID, "PRP0001") // _HID: Hardware ID > Name (_UID, 0x00) // _UID: Unique ID > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_CRS, ResourceTemplate () > { > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > @@ -315,6 +367,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3) > Name (_SEG, 0x00) // _SEG: PCI Segment > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > + Method (_STA) // _STA: Device status > + { > + Return (0xF) > + } > Name (_PRT, Package () // _PRT: PCI Routing Table > { > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > -- > 2.29.0 >