From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web10.22462.1684848422911236125 for ; Tue, 23 May 2023 06:27:03 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=h/Z9vXRm; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 73B5960B24 for ; Tue, 23 May 2023 13:27:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D6D0CC433D2 for ; Tue, 23 May 2023 13:27:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684848421; bh=KFsruax8IzmW6FbuM0Hztjni7JWxwjjhDQlmcbz37OQ=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=h/Z9vXRm/9TT+cx97lx63WqXnZMFSyXOxSDCHY3HxEdHfjLKZgvXsvjFxE0CkwXbo f4MtS8baZBtTpMTQzX4Osg8CnauJCDO7gxt/zxKwiXnoQFGCzUiboag361Eb9c9zw1 MPnD2Z8ZPkCiBG4GIP7J/RRwaXhpnUrcXEp+Qgf1Iqb80QdYVNjKhdL2tQPxZe+CmL YeO1/aqYBLDGyALh1Z681YnsY+7ZS2run2xgEOCg4kt9iKQq86CaBPVj2M6EJVzphU 0wGOMl5GQeksyPrakQmVVXRysnCZ5U/E2ewi6VawNGmZBtD3Z9o3TR9R3F46pD9vJA BZzM0e1z749Qw== Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-4f13d8f74abso8103657e87.0 for ; Tue, 23 May 2023 06:27:01 -0700 (PDT) X-Gm-Message-State: AC+VfDxkLifseyCa02z/WS2iXUddd3eaokOQ0Z/T4Czn9kc7di0CMMXn W40E1qyLOGZftGdvu+5+smktLyxR7f9OFxOyF6I= X-Google-Smtp-Source: ACHHUZ5CaqJm4VuovFQMEaNhnLSPR3WLxwAd2j2oUGQC42xQsxI3ePLOC1of0KmXkW8zmcBdKWQzUxGXeKaLga1kNqY= X-Received: by 2002:ac2:5fae:0:b0:4f1:1de7:1aac with SMTP id s14-20020ac25fae000000b004f11de71aacmr3990378lfe.20.1684848419908; Tue, 23 May 2023 06:26:59 -0700 (PDT) MIME-Version: 1.0 References: <20230523130421.10804-1-sami.mujawar@arm.com> <20230523130421.10804-9-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-9-sami.mujawar@arm.com> From: "Ard Biesheuvel" Date: Tue, 23 May 2023 15:26:48 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH v1 08/12] ArmPkg: Typecast IntID to UINT32 in ArmGicV2EndOfInterrupt To: devel@edk2.groups.io, sami.mujawar@arm.com Cc: ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, neil.jones@blaize.com, pedro.falcato@gmail.com, pierre.gondois@arm.com, Matteo.Carlini@arm.com, Akanksha.Jain2@arm.com, Ben.Adderson@arm.com, Sibel.Allinson@arm.com, nd@arm.com Content-Type: text/plain; charset="UTF-8" On Tue, 23 May 2023 at 15:04, Sami Mujawar wrote: > > The EIOR register of the Gic CPU interface is a 32 bit register. > However, the HARDWARE_INTERRUPT_SOURCE used to represent the > interrupt source (Interrupt ID) is typedefed as UINTN, see > EmbeddedPkg\Include\Protocol\HardwareInterrupt.h > > Therfore, typecast the interrupt ID (Source) value to UINT32 > before setting the EOIR register. Also, add an assert to check > that the value does not exceed 32 bits. > > Signed-off-by: Sami Mujawar > --- > ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c > index 80115b243afabd5e4faad88089af738b19ce4cd1..e98cd9705616e7a8dfc7aaba7c80b176f8f6d0c9 100644 > --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c > +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c > @@ -7,6 +7,7 @@ > **/ > > #include > +#include > #include > > UINTN > @@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt ( > IN UINTN Source > ) > { > - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source); > + ASSERT (Source < MAX_UINT32); Should this be <= ? > + MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source); > } > -- > 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' > > > > > >