From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.18685.1684751886623783377 for ; Mon, 22 May 2023 03:38:06 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=VAD/uK3t; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1100F61CC6 for ; Mon, 22 May 2023 10:38:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 69C65C4339B for ; Mon, 22 May 2023 10:38:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684751885; bh=3eo5Fe+k/xSTGbRJWKoTuC+8Px3h8xfTjI+rBB47XTs=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=VAD/uK3t+Pdg6WTa75xIaYhdfq9wY5Ok4gMVyFFvqNsMI3lAobxAxgYzT2bvaRG1C M3tUHOkx3GX8mziAOA+WaDugCbVHHiXsJLi+KzQYmoXhqw6KUrawhgBQxnwIY+AVk/ 1BlhzJvbNJnT9LOUSbOq5qEjfh/ZtRHS2XjzLVIm+X8/mhKHzDXDIiRRxm1lZ7JLc2 rspGSN8PwF4iosc8naoR3MPotFVkMimqpZs/McRlUzKCIl5CcBdBzda6mDa4Y/M+1X y05vHfSYsgF5nBqnr3MEUuIYLR1x5N9k6Aj6LQThK2JQaLXCro3r+NhalFmdVZhmdY rNdH4txFP4EKg== Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-4efe8b3f3f7so6574195e87.2 for ; Mon, 22 May 2023 03:38:05 -0700 (PDT) X-Gm-Message-State: AC+VfDz/rkqzQ+S30I8IGs+/H4JQ48eqveJZITXX2DlShxMWByVuDVKx /Ftb8f0piLdnXA112o1ecyvSoo/FJXnx/G9yI8o= X-Google-Smtp-Source: ACHHUZ5NmRVqTB7dniZ+dxjjFHCN1KIzXMAURKFyYUxCMy4QQIIaOXd/ALlR6ZeyXaqYrO9fa1itBQXXrnhobqz01yI= X-Received: by 2002:ac2:539a:0:b0:4f2:769a:120e with SMTP id g26-20020ac2539a000000b004f2769a120emr2936638lfh.2.1684751883470; Mon, 22 May 2023 03:38:03 -0700 (PDT) MIME-Version: 1.0 References: <20230517102449.1334621-1-kraxel@redhat.com> <20230517102449.1334621-2-kraxel@redhat.com> In-Reply-To: <20230517102449.1334621-2-kraxel@redhat.com> From: "Ard Biesheuvel" Date: Mon, 22 May 2023 12:37:51 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/3] OvmfPkg/PlatformInitLib: check PcdUse1GPageTable To: Gerd Hoffmann Cc: devel@edk2.groups.io, Jordan Justen , Oliver Steffen , Pawel Polawski , Ard Biesheuvel , Jiewen Yao Content-Type: text/plain; charset="UTF-8" On Wed, 17 May 2023 at 12:24, Gerd Hoffmann wrote: > > If PcdUse1GPageTable is not enabled restrict the physical address space > used to 1TB, to limit the amount of memory needed for identity mapping > page tables. > > The same already happens in case the processor has no support for > gigabyte pages. > Apologies for the noob question, but does this mean EDK2 maps the entire address space 1:1, not just the region that as any DRAM in it? > Signed-off-by: Gerd Hoffmann > --- > OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf | 1 + > OvmfPkg/Library/PlatformInitLib/MemDetect.c | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf > index 86a82ad3e084..5a79d95b689c 100644 > --- a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf > +++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf > @@ -58,6 +58,7 @@ [LibraryClasses.X64] > > [Pcd] > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable > > [FixedPcd] > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase > diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c > index acf90b4e93fd..1102b00ecbf0 100644 > --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c > +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c > @@ -663,6 +663,11 @@ PlatformAddressWidthFromCpuid ( > PhysBits = 40; > } > > + if (!FixedPcdGetBool (PcdUse1GPageTable) && (PhysBits > 40)) { > + DEBUG ((DEBUG_INFO, "%a: limit PhysBits to 40 (PcdUse1GPageTable is false)\n", __func__)); > + PhysBits = 40; > + } > + > PlatformInfoHob->PhysMemAddressWidth = PhysBits; > PlatformInfoHob->FirstNonAddress = LShiftU64 (1, PlatformInfoHob->PhysMemAddressWidth); > } > -- > 2.40.1 >