From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web10.59.1684772372799911237 for ; Mon, 22 May 2023 09:19:32 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Pn2kanAj; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3889460A08 for ; Mon, 22 May 2023 16:19:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BE43C433D2 for ; Mon, 22 May 2023 16:19:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684772371; bh=CbODBrK0sPerJLU19CEXyMmlYLDQNNDPxaAS5oV52OU=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=Pn2kanAjyX1XPOw6xgrQGUlGJdBHR1RwXvbnhBtC13X+nuFa4T00AxVDx0HQGe+X1 qVaxj03I9DwGajX3R8/hRzE/3RWXsoiWsnhjjJY61jU0tsjPDTxc9NqaF4HIwsoOpx SO4ofADgaswqMVS3hTvrfdcHJzmRxFZrXJ3uKyw9tMo+QBEBbgEjDKmZiXC6gt0gMb 8DzUY3NIN4nDw/wlMy7o6clLqPN5ZQ809CAtnXuc7i0dNvBdP91pYjVg2Vr1Aygw02 AW+BWiVMnWNMs5f8zzXR14j0t3UDyDucokSzgf4I8Ff1ADX2uPc2BnnCBBLhguUIGk GOOe4BSiFwaZQ== Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-4f3a99b9177so5070964e87.1 for ; Mon, 22 May 2023 09:19:31 -0700 (PDT) X-Gm-Message-State: AC+VfDwaQm9tj83colymNkBBRrCOLLoDz57mXl4G2JIMedpEipr2Oo4A wDHs4oNSIXELB88iv2SwYVLOdLEX3dTiRas9TfI= X-Google-Smtp-Source: ACHHUZ5TcD7GgeR2nLgxF3ftLFhMnLzYLuWntrbERkIh9i8A91RQFMApARnqY6frwTpVh/Yr+iQk5TY6i/z5mX8YbFM= X-Received: by 2002:ac2:44d6:0:b0:4f1:3eca:769c with SMTP id d22-20020ac244d6000000b004f13eca769cmr3407655lfm.42.1684772369700; Mon, 22 May 2023 09:19:29 -0700 (PDT) MIME-Version: 1.0 References: <20230520091958.310712-1-ardb@kernel.org> In-Reply-To: From: "Ard Biesheuvel" Date: Mon, 22 May 2023 18:19:17 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH edk2-stable202305] ArmPkg/ArmMmuLib: Add missing ISB after page table update To: "Kinney, Michael D" Cc: "devel@edk2.groups.io" , "quic_llindhol@quicinc.com" , "Gao, Liming" , Oliver Steffen Content-Type: text/plain; charset="UTF-8" PR here: https://github.com/tianocore/edk2/pull/4418 I cannot set the 'push' label myself, it seems. On Mon, 22 May 2023 at 16:10, Kinney, Michael D wrote: > > Acked-by: Michael D Kinney > > No objection to merging for the stable tag. > > Mike > > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Leif > > Lindholm > > Sent: Monday, May 22, 2023 3:56 AM > > To: Ard Biesheuvel > > Cc: devel@edk2.groups.io; Gao, Liming ; > > Kinney, Michael D ; Oliver Steffen > > > > Subject: Re: [edk2-devel] [PATCH edk2-stable202305] ArmPkg/ArmMmuLib: > > Add missing ISB after page table update > > > > On Sat, May 20, 2023 at 11:19:58 +0200, Ard Biesheuvel wrote: > > > The helper that updates live page table entries writes a zero entry, > > > invalidates the covered address range from the TLBs, and finally writes > > > the actual entry. This ensures that no TLB conflicts can occur. > > > > > > Writing the final entry needs to complete before any translations can be > > > performed, as otherwise, the zero entry, which describes an invalid > > > translation, may be observed by the page table walker, resulting in a > > > translation fault. For this reason, the final write is followed by a DSB > > > barrier instruction. > > > > > > However, this barrier will not stall the pipeline, and instruction > > > fetches may still hit this invalid translation, as has been observed and > > > reported by Oliver. To ensure that the new translation is fully active > > > before returning from this helper, we have to insert an ISB barrier as > > > well. > > > > > > Cc: Liming Gao > > > Cc: Leif Lindholm > > > Cc: Michael D Kinney > > > Reported-by: Oliver Steffen > > > Tested-by: Oliver Steffen > > > Signed-off-by: Ard Biesheuvel > > > > Reviewed-by: Leif Lindholm > > > > We need this in the stable tag. > > > > Note: the isb instruction forces the synchronization of certain > > architectural events. It has no other effects. I.e., any issues > > exposed by this addition would already have been present before it. > > > > As such, I would suggest this addition need *not* affect the stable > > tag schedule. > > > > / > > Leif > > > > > --- > > > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git > > a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S > > b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S > > > index 887439bc042f0f16..1f0d8057926933d7 100644 > > > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S > > > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S > > > @@ -65,6 +65,7 @@ > > > // write updated entry > > > str x1, [x0] > > > dsb nshst > > > + isb > > > > > > .L2_\@: > > > .endm > > > -- > > > 2.39.2 > > > > > > > > > > > >