From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web11.40816.1629215777814376575 for ; Tue, 17 Aug 2021 08:56:17 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QOx17aOo; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id 6431C61073 for ; Tue, 17 Aug 2021 15:56:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1629215777; bh=5T5L1rZX/aK2NdZpybcFW/q9/r/BwjG41dgVwIMMYEg=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=QOx17aOoE329tI5eqRr6sdPWyS7J0p73oabLdW5qaHIims5798C3PTjWDKXQzWNiY DMmhDrkagnCQgNMK7cKaooWHd5E0hgXgr8Lm3j8u3Dv+mQIO/wE8fHdoR81BciZ4jl Sdu1MLPM/lJTIsM7NapfdfysxT3hr8xcnQZDYXlj/1qvYHJ5wpmRUr8A0XIWbo4z56 +ybjfBHOCycm0Sj9nu4DF/1P750gtK5gBF3Om2L0Sg6cRlduhmW+XdsJzlPqIt2n0R /+1NJ0YcxYnJnGfN++EP4WSN0iDyTNCSsCtwa2JSbGqInsl5nMC5egVrAdzbjm4eSm VL0J0A2fZR8fw== Received: by mail-ot1-f49.google.com with SMTP id v33-20020a0568300921b0290517cd06302dso12680213ott.13 for ; Tue, 17 Aug 2021 08:56:17 -0700 (PDT) X-Gm-Message-State: AOAM5327f/Q3JKJqXlXEgTZuQDaHt7d7wILNLqAisDa57bbocPRnDu2k bCl2ViaWd25GuXQQYL+8Yl4xrXZdej40VF2SIxI= X-Google-Smtp-Source: ABdhPJxD2t7ht9h5NveiB9LNXfv375NVGwbBc3S+2z+gDTB9g40ynYXlR6AAuVa6t8LsosELXEi6qybH6/scmkC//sw= X-Received: by 2002:a9d:5cb:: with SMTP id 69mr3289538otd.90.1629215776724; Tue, 17 Aug 2021 08:56:16 -0700 (PDT) MIME-Version: 1.0 References: <20210807193641.3355697-1-mw@semihalf.com> In-Reply-To: <20210807193641.3355697-1-mw@semihalf.com> From: "Ard Biesheuvel" Date: Tue, 17 Aug 2021 17:56:05 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-platforms PATCH v2 0/4] SolidRun CEx7 Evaluation Board support To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , Samer El-Haj-Mahmoud , Jon Nettleton , alon.rotman@solid-run.com Content-Type: text/plain; charset="UTF-8" On Sat, 7 Aug 2021 at 21:37, Marcin Wojtas wrote: > > Hi, > > The second version comes with a minor improvement, which > is a result of the TF-A support update and changes around the > default IO windows configuration. > > The patches are also available on public branches: > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/cex7-r20210807 > https://github.com/semihalf-wojtas-marcin/edk2-non-osi/commits/cex7-r20210806 > > I would appreciate any comments or remarks. > > Best regards, > Marcin > > Changelog: > v1->v2: > * 3/4: update IO windows reconfiguration, in order to align to > the TF-A changes. > > Marcin Wojtas (3): > edk2-platforms: > Marvell: Armada7k8k/OcteonTx: Select ACPI description as a default > SolidRun/Cn913xCEx7Eval: Add ACPI support > SolidRun/Cn913xCEx7Eval: Add platform support > Pushed as f24aa7708d9b..43259c414370 Thanks, > edk2-non-osi: > SolidRun/Cn913xCEx7Eval: Add DeviceTree > > Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc | 54 ++ > Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc | 64 +++ > Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc | 64 +++ > Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc | 68 +++ > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 7 + > Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc | 57 +++ > Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf | 30 ++ > Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 38 ++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf | 61 +++ > Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h | 31 ++ > Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h | 13 + > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h | 9 + > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h | 114 +++++ > Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c | 294 +++++++++++ > Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 89 ++++ > Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc | 17 + > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl | 383 +++++++++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl | 493 +++++++++++++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl | 515 ++++++++++++++++++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl | 120 +++++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc | 74 +++ > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc | 87 ++++ > 22 files changed, 2682 insertions(+) > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9130Eval.dsc.inc > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9131Eval.dsc.inc > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn9132Eval.dsc.inc > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7.dsc.inc > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.inf > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.inf > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval.inf > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.h > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.h > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.h > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Pcie.h > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/BoardDescriptionLib/BoardDescriptionLib.c > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c > create mode 100644 Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.fdf.inc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9130EvalSsdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9131EvalSsdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn9132EvalSsdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Cn913xCEx7Dsdt.asl > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Dbg2.aslc > create mode 100644 Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xCEx7Eval/Mcfg.aslc > > -- > 2.29.0 >