From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::244; helo=mail-io0-x244.google.com; envelope-from=sigmaepsilon92@gmail.com; receiver=edk2-devel@lists.01.org Received: from mail-io0-x244.google.com (mail-io0-x244.google.com [IPv6:2607:f8b0:4001:c06::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5D9A0211A459E for ; Wed, 6 Jun 2018 22:08:27 -0700 (PDT) Received: by mail-io0-x244.google.com with SMTP id f1-v6so10342344ioh.6 for ; Wed, 06 Jun 2018 22:08:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=tA1vsbZonM5PFpBhGRMZw0rYKzn+V8s4or4IFIhPqcM=; b=E7YJz4blhih580P0RsWVjw2fVlMR5O6KzSvbd6vAKM32SQZqFhKHyHPUzsZ2k330Lb w53FSRlgxVb7qFWqlIYnYt90N6FlrXjQ7+UnVUPac+vQ9GJa+OFPjos+KgU1uUrMfBw1 ohAIboPFGqIWHoVCbFO4uV6OM8goeFbklQjowua060BKoDP+AEbO4IDHTiB/Morcnny1 dVyZQxwbRCPxdSTq5xht2KV6kLcTHWUQf3N0QHFyAbzofIyc1LZuFDcbcB06cHxnmx6f XahU/P+lk10ZmZ3AzPZOExQoBSu39oXC606bgSGn8itSTcZCAapnYfyvi43cBfPIu3xA iZbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tA1vsbZonM5PFpBhGRMZw0rYKzn+V8s4or4IFIhPqcM=; b=MHZEWaCld/uZGyygPDBdN56QZXDe48GvLkeg/4ZwV8DHJPvFbOj19XatXY1rxIlL/x AIC3VENDMfb1l/pG/n0mfpd8Li5qMXr/RigGhA6XT6qtDUs7jabpIWuFCu1LxnK6rWOK onm5QuW5TOyPHT1IVwyDk9yKeDouFK9ywkJiAyf1pn2CVJGwqa+BVenML0zyyE1gx6Ck pdfENz9XWDuy1+4CQII0/HpmnQEOdRxZhHU7Bmg8gXzWE+x92u0HqZ3bc+FuTUVvKclt l7MpfoEBCj/atPrKj2PjeDRNr9cvVowW8mgdlcK3s6ykfd4hqM/ATxKIF5dp2AZU/VjR UJfw== X-Gm-Message-State: APt69E1FJpFZwVD4kpB3VX7ZSGpWgNOtFBaDcxmVvF7lubo0X71V0mB3 7uABQRZPDizDHJ3Gv9Ku9moGsccntxeaBw4ZVLLURQ== X-Google-Smtp-Source: ADUXVKIXwOhEv8HxJz7ux2ViFOp68k2mGLL3uhlYS0jYobrI2U5Jq3V9wYLjENDjjP/+hEPlCY9SlYTDnX5ZDozSXOY= X-Received: by 2002:a6b:1902:: with SMTP id 2-v6mr262940ioz.304.1528348106618; Wed, 06 Jun 2018 22:08:26 -0700 (PDT) MIME-Version: 1.0 References: <20180607050704.9531-1-sigmaepsilon92@gmail.com> In-Reply-To: <20180607050704.9531-1-sigmaepsilon92@gmail.com> From: Michael Zimmermann Date: Thu, 7 Jun 2018 07:08:14 +0200 Message-ID: To: "edk2-devel@lists.01.org" Cc: Leif Lindholm , Ard Biesheuvel Subject: Re: [PATCH] ArmPkg/ArmDisassemblerLib: fix check for MSR instruction X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jun 2018 05:08:27 -0000 Content-Type: text/plain; charset="UTF-8" CC the arm maintainers On Thu, Jun 7, 2018 at 7:07 AM Michael Zimmermann wrote: > > From: M1cha > > GCC8 reported it with the following warning: > ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c: In function 'DisassembleArmInstruction': > ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c:397:30: error: bitwise > comparison always evaluates to false [-Werror=tautological-compare] > if ((OpCode & 0x0db00000) == 0x03200000) { > > This condition trys to be true for both the immediate and the register > version of the MSR instruction. They get identified inside the if-block > using the variable I, which contains the value of bit 25. > > The problem with the comparison reported by GCC is that the > bitmask excludes bit 25, while the value requires it to be set to one: > 0x0db00000: 0000 11011 0 11 00 00 0000 000000000000 > 0x03200000: 0000 00110 0 10 00 00 0000 000000000000 > ^ > So the solution is to just don't require that bit to be set, because > it gets checked later using 'I', which results in the following value: > 0x01200000: 0000 00010 0 10 00 00 0000 000000000000 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Michael Zimmermann > --- > ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > index 29d9414a78b3..b449a5d3cd83 100644 > --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > @@ -394,7 +394,7 @@ DisassembleArmInstruction ( > } > > > - if ((OpCode & 0x0db00000) == 0x03200000) { > + if ((OpCode & 0x0db00000) == 0x01200000) { > // A4.1.38 MSR{} CPSR_, # MSR{} CPSR_, > if (I) { > // MSR{} CPSR_, # > -- > 2.17.1 >