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* [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Default for PeciC10Reset should be 1
@ 2021-08-16  4:02 Nate DeSimone
  2021-08-16  7:55 ` Chiu, Chasel
  2021-08-16 15:53 ` [edk2-devel] " Michael Kubacki
  0 siblings, 2 replies; 5+ messages in thread
From: Nate DeSimone @ 2021-08-16  4:02 UTC (permalink / raw)
  To: devel; +Cc: Chasel Chiu, Sai Chaganty, Benjamin Doron, Michael Kubacki

The default value for CpuConfigLibPreMemConfig->PeciC10Reset
should be 1 so that Peci Reset on C10 exit is disabled.

Other bug fixes in
KabylakeSiliconPkg\Cpu\Library\PeiCpuPolicyLibPreMem\PeiCpuPolicyLib.c

 1. PCI configuration space can only be read 32-bits at a time.
    Converted MmioRead64 to MmioRead32.
 2. Added a RShiftU64() call to prevent compiler instrinsics from
    being inserted. Since this is a 64-bit integer shift done in
    IA-32 mode it is possible for intrinsic calls to be added.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Benjamin Doron <benjamin.doron00@gmail.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
 .../Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c  | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c
index 35041322a7..85baa46208 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c
@@ -1,7 +1,7 @@
 /** @file
   This file is PeiCpuPolicy library.
 
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -45,13 +45,14 @@ LoadCpuConfigLibPreMemConfigDefault (
   CpuConfigLibPreMemConfig->BootFrequency           = 1;    // Maximum non-turbo Performance
   CpuConfigLibPreMemConfig->ActiveCoreCount         = 0;    // All cores active
   CpuConfigLibPreMemConfig->VmxEnable               = CPU_FEATURE_ENABLE;
-  CpuConfigLibPreMemConfig->CpuRatio = ((AsmReadMsr64 (MSR_PLATFORM_INFO) >> N_PLATFORM_INFO_MAX_RATIO) & B_PLATFORM_INFO_RATIO_MASK);
+  CpuConfigLibPreMemConfig->CpuRatio = RShiftU64 (AsmReadMsr64 (MSR_PLATFORM_INFO), N_PLATFORM_INFO_MAX_RATIO) & B_PLATFORM_INFO_RATIO_MASK;
+
   ///
   /// FCLK Frequency
   ///
   CpuFamily  = GetCpuFamily();
   CpuSku     = GetCpuSku();
-  MchBar = MmioRead64 (MmPciBase (SA_MC_BUS, SA_MC_DEV, SA_MC_FUN) + R_SA_MCHBAR) &~BIT0;
+  MchBar = MmioRead32 (MmPciBase (SA_MC_BUS, SA_MC_DEV, SA_MC_FUN) + R_SA_MCHBAR) &~BIT0;
   if (IsPchLinkDmi (CpuFamily) && (MmioRead16 (MmPciBase (SA_PEG_BUS_NUM, SA_PEG_DEV_NUM, SA_PEG10_FUN_NUM) + PCI_VENDOR_ID_OFFSET) != 0xFFFF)) {
     PegDisabled = MmioRead32 ((UINTN) MchBar + R_SA_MCHBAR_BIOS_RESET_CPL_OFFSET) & BIT3;
   } else {
@@ -67,6 +68,8 @@ LoadCpuConfigLibPreMemConfigDefault (
   } else {
     CpuConfigLibPreMemConfig->FClkFrequency = 0;  // 800MHz
   }
+
+  CpuConfigLibPreMemConfig->PeciC10Reset = 1;  // Disables Peci Reset on C10 exit
 }
 
 /**
-- 
2.27.0.windows.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-08-16 21:55 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-08-16  4:02 [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Default for PeciC10Reset should be 1 Nate DeSimone
2021-08-16  7:55 ` Chiu, Chasel
2021-08-16 15:53 ` [edk2-devel] " Michael Kubacki
2021-08-16 17:15   ` Benjamin Doron
2021-08-16 21:55     ` Nate DeSimone

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