From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) by mx.groups.io with SMTP id smtpd.web10.591.1649182466653646102 for ; Tue, 05 Apr 2022 11:14:27 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@gmail.com header.s=20210112 header.b=SqNK1o2s; spf=pass (domain: gmail.com, ip: 209.85.167.44, mailfrom: benjamin.doron00@gmail.com) Received: by mail-lf1-f44.google.com with SMTP id t25so24699800lfg.7 for ; Tue, 05 Apr 2022 11:14:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=SA5BH0uv802h5d35UyxoJ78CdcYEVgMSSI5tpOHwnuE=; b=SqNK1o2sJrghpx8iPa3UvCVYmg3KNzVlIrMDHqW9a7UHmQxTzFvqkXyOZUXUOskEXr xU5cANTw78BVMdt6D4Z2+vZb9FgkDMAwPcLiskL2irFmgnJDC5JCRvxES7KpsvhAVNOD WfWq6m8M4L5r8vMho4I79Jw7oD5gTskX6WIF7Xxc07E6+UeAL0jgjdyRyxwe6uYq0Or8 MRZaznFA0463YZEwTlw/2qy28KuI9/HRByZ2eCmsw+aNMFMali2DLGH1VrE9f1v6eDVP HjhZQYBQg0fqQ0csuh+NDAiaroYUo2ddCQSVgEL1mHVoYq1O8+tfkS6a+ZKY8fIp9hVu UKaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=SA5BH0uv802h5d35UyxoJ78CdcYEVgMSSI5tpOHwnuE=; b=h26JH50t0zaUTN05N0uMO73eK/bZhsbiU2PciBQqccHeq71TwHAawlak3AO/DdnZFm AVfv3wkxbiwXwNcztjLRJQba/Q20T9vrQid4jYQ3qTgeqt+dPxJco75jTSADdL4q9WpN NTZ06XjGUZEkp0fE21ge9SkK0lmFnSAtlzGHqsWPekEDAbbJhmaft8bwNtlNIlRQHoVH L2pq7Z+eP126tb8wOhXJk3NN6LsSNP8nDKbA+yHv6qQRcoP+ev4KE3m1Q0QmOdI+5CV6 zvDmty4jEg3dnIn4K4vGhiakecAop2blh/BpAuPiQeibvGDHxFKL4P44HBWCNXFOwNg8 ISFw== X-Gm-Message-State: AOAM533NImqBQaS/XOkGjrp3+/r5Mm4Uy+ljp83etGXsW0/AMP+EiJa4 5hdCnbFBYEvvy8dpZe8VWefru4Pngw9RDc7ujeaDFjdYSLY= X-Google-Smtp-Source: ABdhPJwbN0uT7M1OZcnruiPr2Jzr98WA0gcMIXeBAKRWcl7v070/ivjKfmQw+W0RwNg9dDMogbJr8cgosZugvfVtRF4= X-Received: by 2002:a05:6512:3ca8:b0:44a:d213:4632 with SMTP id h40-20020a0565123ca800b0044ad2134632mr3460251lfv.273.1649182464553; Tue, 05 Apr 2022 11:14:24 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "Benjamin Doron" Date: Tue, 5 Apr 2022 14:14:13 -0400 Message-ID: Subject: Re: GSoC 2022: Add S3 resume support to MinPlatform To: devel@edk2.groups.io Cc: "Desimone, Nathaniel L" , Michael Kubacki Content-Type: multipart/alternative; boundary="000000000000f8367e05dbec3624" --000000000000f8367e05dbec3624 Content-Type: text/plain; charset="UTF-8" Hi, I'm looking for feedback on a proposal for a large project. I intend to implement S3 resume for MinPlatform (medium project) and develop closed chassis debug over an HDMI cable as an additional project to assist the bringup work. Commonly, serial ports in laptops are either difficult to access or missing entirely. As Nate has previously addressed ( https://github.com/nate-desimone/Bus_Pirate#closed-chassis-debug-over-hdmi), HDMI's DDC pins offer a connection to an I2C controller available early in the boot process, making it a good candidate as early, accessible debug port. On Intel chipsets, the GMBUS implements the I2C controller. It has registers inside the iGFX MMIO and is documented in Intel's iGFX PRMs. I plan to use the register definitions and the documentation of EDID access, along with the I2C specification, to develop this project. Would this make for a good project proposal? I'd appreciate any feedback. Thanks. Best regards, Benjamin On Tue, 22 Mar 2022 at 17:14, Benjamin Doron wrote: > Hi all, > I'm Benjamin Doron. Last year, I worked on a board port to MinPlatform. > This year, I hope to pick up where I left off and help improve MinPlatform > by adding support for S3 resume (time permitting and if my skills are > sufficient, etc). Previously, I worked a little on coreboot (mainly a board > port), and a fork with some improvements for UefiPayloadPkg. > > I'm a little apprehensive reading the task proposal, but I really don't > think that I would have to design the S3 architecture; the easiest part is > adding the module stack. It's some of the deviations from the regular > boot-flow in related areas like memory and CPU init (complicated by > preparing the data structures and the adjacent FSP) that I have to worry > about, as I understand (which I began looking at last year and discussed > with Nate and Michael). > > Before, code analysis gave me some hints and I found issues to address, > but I want to consider actual possibilities for debugging. I've looked at > the S3 boot-flow and from early PEI to the S3Resume2 PPI, the boot script > and SMM, there are a lot of things to verify. Analysing code at each step > to resolve issues might take a while. Some ideas I had: > > - Realistically, the SPI flash console or an accessible serial port. > - Simics, or other simulator/emulator: Would be helpful, if the > architecture of SimicsOpenBoardPkg weren't so different from MinPlatform. > - System debug with DCI: Would be great, but my laptop has > disconnected CPU<->PCH JTAG pins. Fixing this would presumably be very > risky. (I now also have a Tigerlake system, where DCI might work, but I > haven't tried and I don't have a port yet.) > > I should mention that I'll almost certainly be taking at least one course, > but no more than two. > > Looking forward to working with you all! > > Best regards, > Benjamin > --000000000000f8367e05dbec3624 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi,
I'm looking for fe= edback on a proposal for a large project. I intend to implement S3 resume f= or MinPlatform (medium project) and develop closed chassis debug over an HD= MI cable as an additional project to assist the bringup work. Commonly, ser= ial ports in laptops are either difficult to access or missing entirely. As= Nate has previously addressed (https://github.com/nate-desimon= e/Bus_Pirate#closed-chassis-debug-over-hdmi), HDMI's DDC pins offer= a connection to an I2C controller available early in the boot process, mak= ing it a good candidate as early, accessible debug port.

On Intel chipsets, the GMBUS implements the I2C controller. It has r= egisters inside the iGFX MMIO and is documented in Intel's iGFX PRMs. I= plan to use the register definitions and the documentation of EDID access,= along with the I2C specification, to develop this project.

<= /div>
Would this make for a good project proposal? I'd appreciate a= ny feedback. Thanks.

=
Best regards,
Benjamin


On T= ue, 22 Mar 2022 at 17:14, Benjamin Doron <benjamin.doron00@gmail.com> wrote:
Hi all,
I'm Benjamin Doron. Last year, I worked on a board port to MinPl= atform. This year, I hope to pick up where I left off and help improve MinP= latform by adding support for S3 resume (time permitting and if my skills a= re sufficient, etc). Previously, I worked a little on coreboot (mainly a bo= ard port), and a fork with some improvements for UefiPayloadPkg.
<= div>
I'm a little apprehensive reading the task proposal,= but I really don't think that I would have to design the S3 architectu= re; the easiest part is adding the module stack. It's some of the devia= tions from the regular boot-flow in related areas like memory and CPU init = (complicated by preparing the data structures and the adjacent FSP) that I = have to worry about, as I understand (which I began looking at last year an= d discussed with Nate and Michael).

Before, code a= nalysis gave me some hints and I found issues to address, but I want to con= sider actual possibilities for debugging. I've looked at the S3 boot-fl= ow and from early PEI to the S3Resume2 PPI, the boot script and SMM, there = are a lot of things to verify. Analysing code at each step to resolve issue= s might take a while. Some ideas I had:
  • Realistically, th= e SPI flash console or an accessible serial port.
  • Simics, or ot= her simulator/emulator: Would be helpful, if the architecture of SimicsOpen= BoardPkg weren't so different from MinPlatform.
  • System debug wi= th DCI: Would be great, but my laptop has disconnected CPU<->PCH JTAG= pins. Fixing this would presumably be very risky. (I now also have a Tiger= lake system, where DCI might work, but I haven't tried and I don't = have a port yet.)
I should mention that I'll almost= certainly be taking at least one course, but no more than two.
<= div>
Looking forward to working with you all!
=

Best regards,
Benjamin
--000000000000f8367e05dbec3624--