GSoC 2022: Add S3 resume support to MinPlatform

GSoC 2022: Add S3 resume support to MinPlatform

[Benjamin Doron]

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Hi all,
I'm Benjamin Doron. Last year, I worked on a board port to MinPlatform.
This year, I hope to pick up where I left off and help improve MinPlatform
by adding support for S3 resume (time permitting and if my skills are
sufficient, etc). Previously, I worked a little on coreboot (mainly a board
port), and a fork with some improvements for UefiPayloadPkg.

I'm a little apprehensive reading the task proposal, but I really don't
think that I would have to design the S3 architecture; the easiest part is
adding the module stack. It's some of the deviations from the regular
boot-flow in related areas like memory and CPU init (complicated by
preparing the data structures and the adjacent FSP) that I have to worry
about, as I understand (which I began looking at last year and discussed
with Nate and Michael).

Before, code analysis gave me some hints and I found issues to address, but
I want to consider actual possibilities for debugging. I've looked at the
S3 boot-flow and from early PEI to the S3Resume2 PPI, the boot script and
SMM, there are a lot of things to verify. Analysing code at each step to
resolve issues might take a while. Some ideas I had:

   - Realistically, the SPI flash console or an accessible serial port.
   - Simics, or other simulator/emulator: Would be helpful, if the
   architecture of SimicsOpenBoardPkg weren't so different from MinPlatform.
   - System debug with DCI: Would be great, but my laptop has disconnected
   CPU<->PCH JTAG pins. Fixing this would presumably be very risky. (I now
   also have a Tigerlake system, where DCI might work, but I haven't tried and
   I don't have a port yet.)

I should mention that I'll almost certainly be taking at least one course,
but no more than two.

Looking forward to working with you all!

Best regards,
Benjamin

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Re: GSoC 2022: Add S3 resume support to MinPlatform

[Benjamin Doron]

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Hi,
I'm looking for feedback on a proposal for a large project. I intend to
implement S3 resume for MinPlatform (medium project) and develop closed
chassis debug over an HDMI cable as an additional project to assist the
bringup work. Commonly, serial ports in laptops are either difficult to
access or missing entirely. As Nate has previously addressed (
https://github.com/nate-desimone/Bus_Pirate#closed-chassis-debug-over-hdmi),
HDMI's DDC pins offer a connection to an I2C controller available early in
the boot process, making it a good candidate as early, accessible debug
port.

On Intel chipsets, the GMBUS implements the I2C controller. It has
registers inside the iGFX MMIO and is documented in Intel's iGFX PRMs. I
plan to use the register definitions and the documentation of EDID access,
along with the I2C specification, to develop this project.

Would this make for a good project proposal? I'd appreciate any feedback.
Thanks.

Best regards,
Benjamin


On Tue, 22 Mar 2022 at 17:14, Benjamin Doron <benjamin.doron00@gmail.com>
wrote:

> Hi all,
> I'm Benjamin Doron. Last year, I worked on a board port to MinPlatform.
> This year, I hope to pick up where I left off and help improve MinPlatform
> by adding support for S3 resume (time permitting and if my skills are
> sufficient, etc). Previously, I worked a little on coreboot (mainly a board
> port), and a fork with some improvements for UefiPayloadPkg.
>
> I'm a little apprehensive reading the task proposal, but I really don't
> think that I would have to design the S3 architecture; the easiest part is
> adding the module stack. It's some of the deviations from the regular
> boot-flow in related areas like memory and CPU init (complicated by
> preparing the data structures and the adjacent FSP) that I have to worry
> about, as I understand (which I began looking at last year and discussed
> with Nate and Michael).
>
> Before, code analysis gave me some hints and I found issues to address,
> but I want to consider actual possibilities for debugging. I've looked at
> the S3 boot-flow and from early PEI to the S3Resume2 PPI, the boot script
> and SMM, there are a lot of things to verify. Analysing code at each step
> to resolve issues might take a while. Some ideas I had:
>
>    - Realistically, the SPI flash console or an accessible serial port.
>    - Simics, or other simulator/emulator: Would be helpful, if the
>    architecture of SimicsOpenBoardPkg weren't so different from MinPlatform.
>    - System debug with DCI: Would be great, but my laptop has
>    disconnected CPU<->PCH JTAG pins. Fixing this would presumably be very
>    risky. (I now also have a Tigerlake system, where DCI might work, but I
>    haven't tried and I don't have a port yet.)
>
> I should mention that I'll almost certainly be taking at least one course,
> but no more than two.
>
> Looking forward to working with you all!
>
> Best regards,
> Benjamin
>

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Re: [edk2-devel] GSoC 2022: Add S3 resume support to MinPlatform

[Nate DeSimone]

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Hi Benjamin,

Welcome back! That sounds like a great project! Speaking from experience on the HDMI closed chassis work and how much work there is left to do there, I think that the two combined would qualify as a large project and they fit together rather naturally since the HDMI closed chassis debugging will undoubtedly help you get S3 resume working. It sounds like you have done some research already which is great! I’ll dig up the code that I have thus far and point you at it as well. What I have is mostly working but there does seem to be some bugs in it, especially around handling I/O errors on the DDC bus.

From what I remember most of the needed interaction was indeed with registered in the GMBUS, but I seem to recall also having to program some GPIOs as the PHY for the low speed DDC connection was implemented on the PCH side. Again… let me find the code and we can work from there.

Anyway, sounds like an awesome proposal and a fun summer project, feel free to write up a proposal 😊.

With Best Regards,
Nate

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Benjamin Doron
Sent: Tuesday, April 5, 2022 11:14 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Kubacki, Michael <michael.kubacki@microsoft.com>
Subject: Re: [edk2-devel] GSoC 2022: Add S3 resume support to MinPlatform

Hi,
I'm looking for feedback on a proposal for a large project. I intend to implement S3 resume for MinPlatform (medium project) and develop closed chassis debug over an HDMI cable as an additional project to assist the bringup work. Commonly, serial ports in laptops are either difficult to access or missing entirely. As Nate has previously addressed (https://github.com/nate-desimone/Bus_Pirate#closed-chassis-debug-over-hdmi), HDMI's DDC pins offer a connection to an I2C controller available early in the boot process, making it a good candidate as early, accessible debug port.

On Intel chipsets, the GMBUS implements the I2C controller. It has registers inside the iGFX MMIO and is documented in Intel's iGFX PRMs. I plan to use the register definitions and the documentation of EDID access, along with the I2C specification, to develop this project.

Would this make for a good project proposal? I'd appreciate any feedback. Thanks.

Best regards,
Benjamin


On Tue, 22 Mar 2022 at 17:14, Benjamin Doron <benjamin.doron00@gmail.com<mailto:benjamin.doron00@gmail.com>> wrote:
Hi all,
I'm Benjamin Doron. Last year, I worked on a board port to MinPlatform. This year, I hope to pick up where I left off and help improve MinPlatform by adding support for S3 resume (time permitting and if my skills are sufficient, etc). Previously, I worked a little on coreboot (mainly a board port), and a fork with some improvements for UefiPayloadPkg.

I'm a little apprehensive reading the task proposal, but I really don't think that I would have to design the S3 architecture; the easiest part is adding the module stack. It's some of the deviations from the regular boot-flow in related areas like memory and CPU init (complicated by preparing the data structures and the adjacent FSP) that I have to worry about, as I understand (which I began looking at last year and discussed with Nate and Michael).

Before, code analysis gave me some hints and I found issues to address, but I want to consider actual possibilities for debugging. I've looked at the S3 boot-flow and from early PEI to the S3Resume2 PPI, the boot script and SMM, there are a lot of things to verify. Analysing code at each step to resolve issues might take a while. Some ideas I had:

  *   Realistically, the SPI flash console or an accessible serial port.
  *   Simics, or other simulator/emulator: Would be helpful, if the architecture of SimicsOpenBoardPkg weren't so different from MinPlatform.
  *   System debug with DCI: Would be great, but my laptop has disconnected CPU<->PCH JTAG pins. Fixing this would presumably be very risky. (I now also have a Tigerlake system, where DCI might work, but I haven't tried and I don't have a port yet.)
I should mention that I'll almost certainly be taking at least one course, but no more than two.

Looking forward to working with you all!

Best regards,
Benjamin


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Re: [edk2-devel] GSoC 2022: Add S3 resume support to MinPlatform

[Benjamin Doron]

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Hi Nate,
Thanks! I've looked at the basics of I2C, but I've seen from the iGFX PRM that GMBUS implements some registers and error handling the NAKs differently, but I guess that I'll be dealing with that later.

Yeah, I was thinking that if we wanted debug up as soon as possible, then the iGFX BAR and P2SB GPIOs would have to be programmed, so that sounds about right. Synchronising with the FSP's config is probably important too, but I suppose you implemented that/we'll see?

For now, I have a proposal at https://docs.google.com/document/d/1CyyerMfPwvZxkBjfE_-H1OlkZPxH98uqpmb9tBAV_ps.

Best regards,
Benjamin

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Re: [edk2-devel] GSoC 2022: Add S3 resume support to MinPlatform

[Nate DeSimone]

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Hi Benjamin,

Yeah the GMBUS I2C controller gets very temperamental if there is a protocol error. I think you have to go a full reset of the controller to get it back into a working state. I haven’t figured that out completely in my POC code yet so that is one of the things I suspect you will run into early on 😊.

I took a quick look at your proposal, looks good!

Best Regards,
Nate

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Benjamin Doron
Sent: Friday, April 8, 2022 11:33 AM
To: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; devel@edk2.groups.io
Subject: Re: [edk2-devel] GSoC 2022: Add S3 resume support to MinPlatform

Hi Nate,
Thanks! I've looked at the basics of I2C, but I've seen from the iGFX PRM that GMBUS implements some registers and error handling the NAKs differently, but I guess that I'll be dealing with that later.

Yeah, I was thinking that if we wanted debug up as soon as possible, then the iGFX BAR and P2SB GPIOs would have to be programmed, so that sounds about right. Synchronising with the FSP's config is probably important too, but I suppose you implemented that/we'll see?

For now, I have a proposal at https://docs.google.com/document/d/1CyyerMfPwvZxkBjfE_-H1OlkZPxH98uqpmb9tBAV_ps.

Best regards,
Benjamin


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