Re: [PATCH] Arm: GICv3: Don't access GIC_ICDIPR for interrupts 0..31

[Sergei Temerkhanov <s.temerkhanov@gmail.com>]

On Fri, May 19, 2017 at 1:26 PM, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Fri, May 19, 2017 at 05:37:02AM +0300, Sergei Temerkhanov wrote:
>> On Thu, May 18, 2017 at 7:08 PM, Ard Biesheuvel
>> <ard.biesheuvel@linaro.org> wrote:
>> > On 16 May 2017 at 03:56, Sergey Temerkhanov <s.temerkhanov@gmail.com> wrote:
>> >> These registers are reserved for PPIs and unimplemented on
>> >> some architectures
>> >>
>> >
>> >
>> > What do you mean by 'architectures'?
>>
>> GIC core implementations.
>>
>> > Could you elaborate on which SoC
>> > needs this?
>> At least Cavium ThunderX/OcteonTX need it.
>>
>> The GICv3 spec says this on the subject:
>>
>> 8.9.12 GICD_IPRIORITYR, Interrupt Priority Registers, n = 0 - 254
>>
>> "These registers are always used when affinity routing is not enabled.
>> When affinity routing is enabled for the Security state of an
>> interrupt: • GICR_IPRIORITYR is used instead of GICD_IPRIORITYR where
>> n = 0 to 7 (that is, for SGIs and PPIs). • GICD_IPRIORITYR is RAZ/WI
>> where n = 0 to 7."
>
> Since they are RAZ/WI, why is this change needed?

B/c for some GICv3 cores accessing these registers result in exceptions

Regards,
Sergey

>
> /
>     Leif
>
>> >
>> >> Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
>> >> ---
>> >>  ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 2 +-
>> >>  1 file changed, 1 insertion(+), 1 deletion(-)
>> >>
>> >> diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
>> >> index 8af97a9..dc6b896 100644
>> >> --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
>> >> +++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
>> >> @@ -257,7 +257,7 @@ GicV3DxeInitialize (
>> >>      MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
>> >>    }
>> >>
>> >> -  for (Index = 0; Index < mGicNumInterrupts; Index++) {
>> >> +  for (Index = 32; Index < mGicNumInterrupts; Index++) {
>> >>      GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
>> >>
>> >>      // Set Priority
>> >> --
>> >> 2.7.4
>> >>
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