From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk0-x243.google.com (mail-vk0-x243.google.com [IPv6:2607:f8b0:400c:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2ADB821A16EEF for ; Fri, 19 May 2017 07:31:38 -0700 (PDT) Received: by mail-vk0-x243.google.com with SMTP id w1so1605941vkd.1 for ; Fri, 19 May 2017 07:31:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=HH+UxEYxD7GhAhicbW8uXcX3anVnrOGwtkLztYVLgwE=; b=E3pZAt0RAaDkVMhV+MELEOOYD0bN+f7cEhGr1Qvb/cEnr1FFWMVSNAeZynu44iZ1LR /3AuEyLM7ItiC+ug3v8JdXfPndUN5Y4hW/B6Bv8s+YCtzQz2ptnl9ln8sfhEnFykCIiU 0tLX6oR0iAqAH0CiKaJbfrC3iCkUSp415I6lMbhYE5HJQbszxWjpEH/mscdNqWOq7DtF LkZXW7qY+uibspV0bl6AqEaiJsAyasTPWB9Vc9S/V13ZXILTmklSWPUbZ3wg7pYqy8Ue GAsVXfvvlcG+WZbTubs1biStf8PblQuKRw0vP493qfuz2nfUqek/emJllI3+DSVuJ6RB 3vqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=HH+UxEYxD7GhAhicbW8uXcX3anVnrOGwtkLztYVLgwE=; b=b5shc5kvoLhvGebh9W9JqvYdAHysa884QUSe6FfqiLj7TkOXTNfBkGGSo4L+1chFQ2 FkvBC6ED3H46B0ODjRBygo4TCWMH76LMeUleT348Ak5/rp7KD6e3EadYTs5SFUv7YVWw JLbIkjBVJ/SsBFsNygatD07tXv6JEaOuR/JwOmFEwGO3m6HihottEBeFTJ1uF30JTx2U xgagFzq4CO6GKXUffMivdJ7CJjspSAC8NSM9CiIwEas//Y4mfeMA+iQrHLs8RnCV7ukQ Hts18iRv5kxBZZI3IVrybQCmf4n4PHL43LxK+R7kbB00C4Ehar4moPyc5SqaD5Vd1bt2 ivig== X-Gm-Message-State: AODbwcA+LjjgXz2YZ/FwtftJzpiwNyZrRPRZPKQ9iR4SslOjcqS9D0sL T/zknAXH7oBDJoRzuVU+yjOdY3ruqA== X-Received: by 10.31.152.209 with SMTP id a200mr1475644vke.19.1495204296913; Fri, 19 May 2017 07:31:36 -0700 (PDT) MIME-Version: 1.0 Received: by 10.159.35.78 with HTTP; Fri, 19 May 2017 07:31:36 -0700 (PDT) In-Reply-To: <20170519102622.GC1657@bivouac.eciton.net> References: <1494903391-716-1-git-send-email-s.temerkhanov@gmail.com> <20170519102622.GC1657@bivouac.eciton.net> From: Sergei Temerkhanov Date: Fri, 19 May 2017 17:31:36 +0300 Message-ID: To: Leif Lindholm Cc: Ard Biesheuvel , "edk2-devel@lists.01.org" Subject: Re: [PATCH] Arm: GICv3: Don't access GIC_ICDIPR for interrupts 0..31 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 May 2017 14:31:38 -0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, May 19, 2017 at 1:26 PM, Leif Lindholm w= rote: > On Fri, May 19, 2017 at 05:37:02AM +0300, Sergei Temerkhanov wrote: >> On Thu, May 18, 2017 at 7:08 PM, Ard Biesheuvel >> wrote: >> > On 16 May 2017 at 03:56, Sergey Temerkhanov = wrote: >> >> These registers are reserved for PPIs and unimplemented on >> >> some architectures >> >> >> > >> > >> > What do you mean by 'architectures'? >> >> GIC core implementations. >> >> > Could you elaborate on which SoC >> > needs this? >> At least Cavium ThunderX/OcteonTX need it. >> >> The GICv3 spec says this on the subject: >> >> 8.9.12 GICD_IPRIORITYR, Interrupt Priority Registers, n =3D 0 - 254 >> >> "These registers are always used when affinity routing is not enabled. >> When affinity routing is enabled for the Security state of an >> interrupt: =E2=80=A2 GICR_IPRIORITYR is used instead of GICD_IPRIORITYR = where >> n =3D 0 to 7 (that is, for SGIs and PPIs). =E2=80=A2 GICD_IPRIORITYR is = RAZ/WI >> where n =3D 0 to 7." > > Since they are RAZ/WI, why is this change needed? B/c for some GICv3 cores accessing these registers result in exceptions Regards, Sergey > > / > Leif > >> > >> >> Signed-off-by: Sergey Temerkhanov >> >> --- >> >> ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 2 +- >> >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> >> >> diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drive= rs/ArmGic/GicV3/ArmGicV3Dxe.c >> >> index 8af97a9..dc6b896 100644 >> >> --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c >> >> +++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c >> >> @@ -257,7 +257,7 @@ GicV3DxeInitialize ( >> >> MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_A= RE); >> >> } >> >> >> >> - for (Index =3D 0; Index < mGicNumInterrupts; Index++) { >> >> + for (Index =3D 32; Index < mGicNumInterrupts; Index++) { >> >> GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Inde= x); >> >> >> >> // Set Priority >> >> -- >> >> 2.7.4 >> >> >> >> _______________________________________________ >> >> edk2-devel mailing list >> >> edk2-devel@lists.01.org >> >> https://lists.01.org/mailman/listinfo/edk2-devel