From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qk1-f195.google.com (mail-qk1-f195.google.com [209.85.222.195]) by mx.groups.io with SMTP id smtpd.web11.13132.1592667903770127651 for ; Sat, 20 Jun 2020 08:45:04 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=C2fmc0Rs; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.222.195, mailfrom: mw@semihalf.com) Received: by mail-qk1-f195.google.com with SMTP id j80so550779qke.0 for ; Sat, 20 Jun 2020 08:45:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Ic0wQkudy5wbR0Vm9rOTt/zsb26TarZXTK2p0fwezS0=; b=C2fmc0RsBDkEDBNWP2ue46sT8+svDkM4EbqcHZ9EiDozymYBvSa3tCt2mc/5Ftunk+ iZUA4NvkZcTRarM0e0Rk5d7ZkYx3J0HaZY/c48Uu8Vi0rzBjnGV5E3cADkOz0M8ba8s6 J+ZhuLj/+WnPvmBd4hwamMopn+5eCmm/EDXMzlfMHTkDZkUs+TouAfrTTkajCYSSPf6V Su8dbwfAXm7gRYE6wSK6gvMPDRED6u9DXHDFtq3J8lcNV15tDPfD0sEl5mZVuaaBzTJP 20TqWWFRGqFc8J3TcBwU/JlQiI7P9WxnMZzeW4Me1oXYfD6eVrJdCe3IiD2WFo31adc8 F1LQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Ic0wQkudy5wbR0Vm9rOTt/zsb26TarZXTK2p0fwezS0=; b=svSpMlZ8V0JlTcLMg+crsXUcTEiOm7DSaEAyaV1QLjFX3dacKRFQjUZhig/Oh1mth+ QJbfze/wqAggYbas/IQjsEClO2Bq+1Qrf40gQoB0Oomj6IqAWOoYEXfgRVfNw3IAl2OC +FllOyUDFH0ud/gFSdvV1VGsLmOWA4YPqh6H/3UjP/V3nFNKfY4lgq6XbsH3W9wkOjPs V05uoj5hG5Ps9Olv4P7fcEH54eWsBfCz9Ql8ipCkycfdSh/hSXKX5M0fWZry4Z8BOV5K RHfdX12gMjxdk1Xb85fwOru0k4M92sUzbgEVn5RTwgZv9tWzVuYJHjxCBx7Tiji/g3q7 WndA== X-Gm-Message-State: AOAM533KUTfg7R6clgyVUhyT3YDhuXKBniYrAljvJEdGy/ahiFI4La9J JAs1k36rSUBvDgBzc3I+5LZGH1P6THmzI8bEdVWIaA== X-Google-Smtp-Source: ABdhPJwrzFvzySYv7E3BdBwoxmwhEk9tJdaV6GI00yBqzLEx8xmzQJHmfM9FP3h1FGQi6JWWS5gcAKzhTya5dNgKw/o= X-Received: by 2002:a37:48c7:: with SMTP id v190mr1986462qka.153.1592667902833; Sat, 20 Jun 2020 08:45:02 -0700 (PDT) MIME-Version: 1.0 References: <7860963d-c540-1577-600c-106d7236f921@arm.com> <14107.1591915430415249079@groups.io> <1886d7a0-cc28-54ce-6d57-b42f3525d6e2@arm.com> <3576864E-A42B-41B1-9D6D-289BE362AECC@unrelenting.technology> In-Reply-To: From: "Marcin Wojtas" Date: Sat, 20 Jun 2020 17:44:50 +0200 Message-ID: Subject: Re: [edk2-devel] Additional configuration options on Armada/Cn913x To: myfreeweb Cc: Mark Kettenis , edk2-devel-groups-io , Ard Biesheuvel Content-Type: multipart/alternative; boundary="000000000000980a3e05a885e4cf" --000000000000980a3e05a885e4cf Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Greg, pt., 12 cze 2020 o 19:09 Marcin Wojtas napisa=C5=82(a): > pt., 12 cze 2020 o 18:32 myfreeweb > napisa=C5=82(a): > > > > > > > > On June 12, 2020 3:07:21 PM UTC, Marcin Wojtas wrote: > > >Hi, > > > > > >I see Greg was dropped in the meantime. > > > > > >pt., 12 cze 2020 o 10:45 Ard Biesheuvel > napisa=C5=82(a): > > >> > > >> On 6/12/20 12:43 AM, Mark Kettenis via Groups.Io wrote: > > >> > On Thu, Jun 11, 2020 at 04:17 PM, Ard Biesheuvel wrote: > > >> > > > >> > On 6/11/20 4:07 PM, greg@unrelenting.technology wrote: > > >> > > > >> > June 11, 2020 4:19 PM, "Ard Biesheuvel" < > ard.biesheuvel@arm.com> > > >> > wrote: > > >> > > > >> > On 6/5/20 5:19 PM, Marcin Wojtas via groups.io wrote: > > >> > > > >> > Hi, > > >> > I'd like to ask for comments before I develop the > actual > > >> > code - > currently we have 2 workarounds > > >> > done specifically for Linux: > > >> > a. ECAM shift in PCIE > > >> > b. SPCR address space definition > > >> > > > >> > What does this mean? > > >> > > > >> > The SPCR in upstream edk2 is set up to work around some > Linux > > >> > weirdness (?) and I have to do this: > > >> > > > >> > > https://github.com/myfreeweb/edk2-platforms/commit/74ec98a6498e78d2ae6c86= 1db88487bf75f2e1a1 > > >> > > > >> > to make it work on FreeBSD. > > >> > > > >> > Surely, they can't both be correct. Marcin? > > >> > > > >> > Assuming the serial port on Armada/Cn911x is the same as on > Armada8k, > > >> > the following DT properties would be applicable: > > >> > > > >> > reg-shift =3D <2>; > > >> > reg-io-width =3D <1> > > >> > > > >> > which means the registers are spaced 32-bits apart but have to be > > >> > accessed using 8-bit load/store instructions. I'd say that > > >> > means that the ACPI Generic Address Space should have > RegisterBitWidth > > >> > set to 32 and AccessSize set to BYTE. > > >> > In other words, I think that the current: > > >> > > > >> > #define MV_UART_AS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMORY, 32, 0, > > >> > EFI_ACPI_5_0_BYTE, Address } > > >> > > > >> > is correct. That certainly is what works for OpenBSD. > > >> > > >> Thanks Mark > > >> > > >> The struct type is defined as > > >> > > >> typedef struct { > > >> UINT8 AddressSpaceId; > > >> UINT8 RegisterBitWidth; > > >> UINT8 RegisterBitOffset; > > >> UINT8 AccessSize; > > >> UINT64 Address; > > >> } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE; > > >> > > >> so I agree that the current definition matches a UART that requires > byte > > >> accesses on registers that are 32 bits apart. > > >> > > >> So why does FreeBSD deviate from this? > > > > > >Greg, can you please explain your concerns here? > > > > Yeah, looking at our code again, looks like we did screw it up, seems > like we are using register width as access width and vice versa :/ > > Ok, so I'll prepare only a switch to toggle the ECAM hack enablement. > > Any chance you submit a fix to phabricator? > > > I pushed a patch to review: Please review and test: https://reviews.freebsd.org/D25373 Best regards, Marcin --000000000000980a3e05a885e4cf Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Greg,

pt., 12 cze 2020 o 19:09=C2=A0Mar= cin Wojtas <mw@semihalf.com> n= apisa=C5=82(a):
= pt., 12 cze 2020 o 18:32 myfreeweb <greg@unrelenting.technology> napi= sa=C5=82(a):
>
>
>
> On June 12, 2020 3:07:21 PM UTC, Marcin Wojtas <mw@semihalf.com> wrote:
> >Hi,
> >
> >I see Greg was dropped in the meantime.
> >
> >pt., 12 cze 2020 o 10:45 Ard Biesheuvel <ard.biesheuvel@arm.com> napisa= =C5=82(a):
> >>
> >> On 6/12/20 12:43 AM, Mark Kettenis via Groups.Io wrote:
> >> > On Thu, Jun 11, 2020 at 04:17 PM, Ard Biesheuvel wrote:<= br> > >> >
> >> >=C2=A0 =C2=A0 =C2=A0On 6/11/20 4:07 PM, greg@unrelenting.= technology wrote:
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0June 11, 2020 4:19 PM, = "Ard Biesheuvel" <ard.biesheuvel@arm.com>
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0wrote:
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0On 6/5/20= 5:19 PM, Marcin Wojtas via groups.io wrote:
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0Hi,
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0I'd like to ask for comments before I develop the actual
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0code - > currently we have 2 workarounds
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0done specifically for Linux:
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0a. ECAM shift in PCIE
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0b. SPCR address space definition
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0What does= this mean?
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0The SPCR in upstream ed= k2 is set up to work around some Linux
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0weirdness (?) and I hav= e to do this:
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0https://github.com/myfreeweb/edk= 2-platforms/commit/74ec98a6498e78d2ae6c861db88487bf75f2e1a1
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0to make it work on Free= BSD.
> >> >
> >> >=C2=A0 =C2=A0 =C2=A0Surely, they can't both be correc= t. Marcin?
> >> >
> >> > Assuming the serial port on Armada/Cn911x is the same as= on Armada8k,
> >> > the following DT properties would be applicable:
> >> >
> >> > reg-shift =3D <2>;
> >> > reg-io-width =3D <1>
> >> >
> >> > which means the registers are spaced 32-bits apart but h= ave to be
> >> > accessed using 8-bit load/store instructions.=C2=A0 I= 9;d say that
> >> > means that the ACPI Generic Address Space should have Re= gisterBitWidth
> >> > set to 32 and AccessSize set to BYTE.
> >> > In other words, I think that the current:
> >> >
> >> > #define MV_UART_AS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMO= RY, 32, 0,
> >> > EFI_ACPI_5_0_BYTE, Address }
> >> >
> >> > is correct.=C2=A0 That certainly is what works for OpenB= SD.
> >>
> >> Thanks Mark
> >>
> >> The struct type is defined as
> >>
> >> typedef struct {
> >>=C2=A0 =C2=A0 UINT8=C2=A0 =C2=A0AddressSpaceId;
> >>=C2=A0 =C2=A0 UINT8=C2=A0 =C2=A0RegisterBitWidth;
> >>=C2=A0 =C2=A0 UINT8=C2=A0 =C2=A0RegisterBitOffset;
> >>=C2=A0 =C2=A0 UINT8=C2=A0 =C2=A0AccessSize;
> >>=C2=A0 =C2=A0 UINT64=C2=A0 Address;
> >> } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
> >>
> >> so I agree that the current definition matches a UART that re= quires byte
> >> accesses on registers that are 32 bits apart.
> >>
> >> So why does FreeBSD deviate from this?
> >
> >Greg, can you please explain your concerns here?
>
> Yeah, looking at our code again, looks like we did screw it up, seems = like we are using register width as access width and vice versa :/

Ok, so I'll prepare only a switch to toggle the ECAM hack enablement.
Any chance you submit a fix to phabricator?



I pushed a patch to review: Please= review and test:

Best regard= s,
Marcin=C2=A0
--000000000000980a3e05a885e4cf--