From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=lEA7j8H5; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.160.194, mailfrom: mw@semihalf.com) Received: from mail-qt1-f194.google.com (mail-qt1-f194.google.com [209.85.160.194]) by groups.io with SMTP; Thu, 16 May 2019 07:22:32 -0700 Received: by mail-qt1-f194.google.com with SMTP id y22so4057454qtn.8 for ; Thu, 16 May 2019 07:22:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=L7pnyNJlpigV3UnIZDNWFdhtog07W+9/+Zv51uXRDBU=; b=lEA7j8H5rFUzL4ySwvm3jihH8LN+SBH1erS7j1qPNFFEQl+ffAtXRrEkCqnvqFdDpM g4VexIHAA5vgQ9rbEH0ATy9id7b5BWdV6OIoCXmaXPQ9OZlN5bmZq54PRArzsIpZs13V 3GjXrALq2SQxbL15N65a6yU47rzmiJfd9fU/nOb64+FaL/G9Hdl0s6Nzleo2b9hvZuq3 dqtPtUge9KOKAfLv83YqTCY9CCBbLly0hpqRAFSufc/BOXglnE6kBwqxVxMqQIj/lB3L ms4tbwRhSAcKzsJDDjM1YGXA1OOupIHjmIAaolxAdD30VCzJLV0uZFrPizz6EcDUP82u mK0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=L7pnyNJlpigV3UnIZDNWFdhtog07W+9/+Zv51uXRDBU=; b=LcJObP4nQAtfRrceBiS0XVz+yrHWgCHGI/eBO6+RDXO7D1etRWxikcPnbUKeyWtLys Gh4QOB0P2tpQq5F83jDZ0g+Z0KbWqHR1NIdby9tRdTqDtJSfcP9ICIkm4D140j/GJuWA k9qDtx9D+kc1z4VrMQPGoHoBZ+X8+xKb6547WVeLNAooSjYBMNuqIZBzcnwzLdGxLT+D kVkpxj5yYGXFAJ74c8ibmZ2BKCg5a6N0X/K0qmEXXXMSGA2kG0CW8DxzkHp6GUpsTC25 g8PFFG8PtoVodNneTlfacF4C9LWgZFjM9tQNN0IghjffhGCCc/yOptwTr1QFhJvVDzKH Svvg== X-Gm-Message-State: APjAAAX9R2X9y6w5yac0YJbmpjKIuUwwI9VV7qB584c0tmpivW/Vpjuf pgYXOi2fTzIvyfmVi37CELmZYV6CgWWryDkf/LAm0w== X-Google-Smtp-Source: APXvYqxt6+d0L5w0N5mFkfHDd8Pt5ae1p6h1AX7havQx3ZuPMmop0P/GFgLFPGjKLIL9dYKh0Edt6s0vwzo6nOmfrWw= X-Received: by 2002:a0c:94da:: with SMTP id k26mr23323822qvk.124.1558016550921; Thu, 16 May 2019 07:22:30 -0700 (PDT) MIME-Version: 1.0 References: <1557395622-32425-1-git-send-email-mw@semihalf.com> <1557395622-32425-9-git-send-email-mw@semihalf.com> In-Reply-To: From: "Marcin Wojtas" Date: Thu, 16 May 2019 16:22:18 +0200 Message-ID: Subject: Re: [edk2-platforms: PATCH 08/14] Marvell/Armada7k8k: Enable PCIE support To: Ard Biesheuvel Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk , Kostya Porotchkin , Jici Gao , Rebecca Cran , Mark Kettenis Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, czw., 16 maj 2019 o 16:16 Ard Biesheuvel napisa= =C5=82(a): > > On Thu, 9 May 2019 at 11:54, Marcin Wojtas wrote: > > > > Wire up the platform libraries to the generic drivers so that we can us= e > > PCI devices and UEFI, and leave the controller initialized so that the > > OS can boot it using a generic driver of its own. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Marcin Wojtas > > --- > > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 17 +++++++++++++++-- > > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 5 +++++ > > 2 files changed, 20 insertions(+), 2 deletions(-) > > > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Ma= rvell/Armada7k8k/Armada7k8k.dsc.inc > > index 545b369..f78a76b 100644 > > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > @@ -70,8 +70,10 @@ > > IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecom= pressLib.inf > > CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > - PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf > > - PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf > > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > > + PciHostBridgeLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHos= tBridgeLib/PciHostBridgeLib.inf > > + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibP= ci.inf > > + PciExpressLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciExpres= sLib/PciExpressLib.inf > > > > # Basic UEFI services libraries > > UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > @@ -407,6 +409,12 @@ > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x000= 10000 > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010= 000 > > > > + # PCIE > > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 > > + > > + # SoC Configuration Space > > + gMarvellTokenSpaceGuid.PcdConfigSpaceBaseAddress|0xE0000000 > > + > > !if $(CAPSULE_ENABLE) > > [PcdsDynamicExDefault.common.DEFAULT] > > gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescri= ptor|{0x0}|VOID*|0x100 > > @@ -520,6 +528,11 @@ > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf > > Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf > > > > + # PCI > > + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > > This driver requires gArmTokenSpaceGuid.PcdPciIoTranslation to be set > to a sane value. Are you sure this is the case for your platforms? > Do you mean the IO space for the controller? If yes, I'll set the PCD to according value I use in board description. I don't have an old enough endpoint that requires IO space to test :) Best regards, Marcin > > + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > > + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > > + > > # Console packages > > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvel= l/Armada7k8k/Armada7k8k.fdf > > index 3a320ba..e22f514 100644 > > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf > > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf > > @@ -174,6 +174,11 @@ FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0ba= f74b1b30c > > INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf > > INF Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf > > > > + # PCI > > + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > > + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > > + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > > + > > # Multiple Console IO support > > INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > -- > > 2.7.4 > >