From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qk1-f179.google.com (mail-qk1-f179.google.com [209.85.222.179]) by mx.groups.io with SMTP id smtpd.web08.35408.1629784802378515765 for ; Mon, 23 Aug 2021 23:00:02 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=ULLiGrHe; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.222.179, mailfrom: mw@semihalf.com) Received: by mail-qk1-f179.google.com with SMTP id ay33so10438391qkb.10 for ; Mon, 23 Aug 2021 23:00:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=nn7f2IYOi4+U+8Z5QVVMRuGRhdw7cq5Eif4tiQjeFow=; b=ULLiGrHeiUU8hDvL6CF+glHvu+1EmKBkkniuOTLCGg9fZ3ImIACe1CLOu/o6VQ8mT/ N+AfMVrJ7oTbVj5YqbvOSJ08DmHbv22n0ogqNbqHPvPcXSBB0850UjPPjQUTOxdFm7Ds 6IeHr2rn+sYpBWJdNE6FuZVOjoP61Tx+Jg60w1iEho88FLJ4Xi63uy60mCeB0ZJipQXD Ru+T6B9ji5e/Z4oyvQH3oYRCo+Db0ilrVZujDJtrydvsZUyis1nIcYCcVwa3zEBy9+cP o8WobZZcduLgFxOKK5B0F+HqDbE5pcHX14/O0BoNT5uxzRLBSdzHKv5cIwFYcIJI+erG 8THQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=nn7f2IYOi4+U+8Z5QVVMRuGRhdw7cq5Eif4tiQjeFow=; b=TU6pLXM06rxjnde4UUIYjJ4dOcneVlzCWEcD62765/ajakA+ZpAtySkiLeQa5R39q+ Rmhogw5S2oJjKRTX8HR90KGSHX5SuOaPOi+dmzzQAqX3lItHpNM7pzB9tOWhsiKliG8I 5fKAYX81vRrTwI1Kv4L+7MppItsEUgCQUjJDNbgFqwALPFp9HkeCKuBgBrthbXVITPN8 axKmQZo2d2F0MGkCZxxxp42vn6NDHmdAGMZ3gNyt55AEwgOMizifjqFe4QSzCw2Q7p0Y VyeopWO+IDuYf8QpqgiSU7xKJF/1fg/kgucqGMceZc3bw7qXL/pVqTf4rYapgsiTTa8A bspQ== X-Gm-Message-State: AOAM531bZE27FJX6mzSQLkwllHPGsWwhppQBpU04XWMWBJSXBA8a+mQT 8vket7fJm7/DgDIhS/8tyynmeNolKXJzVvg2LTIH/A== X-Google-Smtp-Source: ABdhPJwXBhG1KeXA+ZBlHea340YsHr0VTISiFinxNbc68VgdQEZ1G7Sil1zkBL93XfNF3yiCY2WLYffKEstyHXd/yus= X-Received: by 2002:a37:a302:: with SMTP id m2mr24707863qke.155.1629784801033; Mon, 23 Aug 2021 23:00:01 -0700 (PDT) MIME-Version: 1.0 References: <20210810220403.3504123-1-mw@semihalf.com> In-Reply-To: From: "Marcin Wojtas" Date: Tue, 24 Aug 2021 08:00:00 +0200 Message-ID: Subject: Re: [edk2-platforms PATCH v2] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables To: Ard Biesheuvel Cc: edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Samer El-Haj-Mahmoud , Sunny Wang , Grzegorz Bernacki , upstream@semihalf.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, =C5=9Br., 11 sie 2021 o 12:58 Marcin Wojtas napisa=C5=82(= a): > > Hi Ard, > > =C5=9Br., 11 sie 2021 o 12:42 Ard Biesheuvel napisa=C5= =82(a): > > > > On Wed, 11 Aug 2021 at 00:04, Marcin Wojtas wrote: > > > > > > BBR 1.0 spec says that _STA is required for each device in DSDT or SS= DT. > > > Fix that for all platforms with the Marvell SoC's. > > > > > > Signed-off-by: Marcin Wojtas > > > > Did you add back the _STA methods that I removed from the secondary > > UARTs you introduced in the original series? > > > > Yes, this patch adds _STA to the relevant COM2 nodes in > Armada80x0McBin and Cn913xDbA DSDT files. > Do you have any further comments to this patch? Best regards, Marcin > > > > > --- > > > Changelog: > > > v1->v2: > > > * Rebase on top of tree > > > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 = +++++++++++++++ > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 76 = ++++++++++++++++++++ > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 76 = ++++++++++++++++++++ > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 12 = ++++ > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 60 = ++++++++++++++++ > > > 5 files changed, 280 insertions(+) > > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.= asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > index 345c1e4dd6..88e38efeeb 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA7K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA7K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA7K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA7K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.= asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > index 91401c74c8..77d3aebaf1 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x01) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Ds= dt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > index 7931dc3ef8..a7d1c76e07 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -92,6 +112,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -123,6 +147,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -151,6 +179,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -170,6 +202,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -189,6 +225,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -208,6 +248,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -235,6 +279,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, ARMADA80X0_MCBIN_DBG2_UART_REG_BASE) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -261,6 +309,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -278,6 +330,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0101") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -312,6 +368,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -351,6 +411,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > @@ -429,6 +493,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -449,6 +517,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x01) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > @@ -475,6 +547,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.a= sl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > index 8377b13763..d6619e367b 100644 > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.a= sl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > index 8c098cd14c..7335e443c6 100644 > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > @@ -21,21 +21,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "CN9130", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -43,6 +59,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "CN9130", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -68,6 +88,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "CN9130", 3) > > > Name (_HID, "MRVL0003") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -99,6 +123,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "CN9130", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -127,6 +155,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -146,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -165,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -192,6 +232,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, CN913X_DBG2_UART_REG_BASE) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -218,6 +262,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -240,6 +288,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -318,6 +370,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -344,6 +400,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > -- > > > 2.29.0 > > >