From: "Marcin Wojtas" <mw@semihalf.com>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: edk2-devel-groups-io <devel@edk2.groups.io>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
"jsd@semihalf.com" <jsd@semihalf.com>,
Grzegorz Jaszczyk <jaz@semihalf.com>,
Kostya Porotchkin <kostap@marvell.com>,
Jici Gao <Jici.Gao@arm.com>, Rebecca Cran <rebecca@bluestop.org>,
Mark Kettenis <kettenis@jive.eu>
Subject: Re: [edk2-platforms: PATCH 02/14] Marvell/Library: ArmadaSoCDescLib: Add PCIE information
Date: Fri, 10 May 2019 17:03:37 +0200 [thread overview]
Message-ID: <CAPv3WKcmcU7_emKX5EzANB2C6=qkdH6GWrnR47Lot5F6o-LgPg@mail.gmail.com> (raw)
In-Reply-To: <20190510145941.lsbv44eeuw67vbav@bivouac.eciton.net>
pt., 10 maj 2019 o 16:59 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
>
> On Thu, May 09, 2019 at 11:53:30AM +0200, Marcin Wojtas wrote:
> > This patch introduces new library callback (ArmadaSoCPcieGet ()),
> > which dynamically allocates and fills array with all available PCIE
> > controllers' base addresses. It is needed for the configuration of PCIE,
> > whose support will be added in the upcoming patches.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > ---
> > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 +++
> > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 20 +++++++++
> > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 44 ++++++++++++++++++++
> > 3 files changed, 70 insertions(+)
> >
> > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> > index 8bbc5b0..e904222 100644
> > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> > @@ -82,6 +82,12 @@
> > #define MV_SOC_MDIO_ID(Cp) (Cp)
> >
> > //
> > +// Platform description of PCIE
> > +//
> > +#define MV_SOC_PCIE_PER_CP_COUNT 3
> > +#define MV_SOC_PCIE_BASE(Index) (0x600000 + ((Index) * 0x20000))
> > +
> > +//
> > // Platform description of PP2 NIC
> > //
> > #define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE (Cp)
> > diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> > index fc17c3a..ff617e6 100644
> > --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> > +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> > @@ -191,6 +191,26 @@ ArmadaSoCDescXhciGet (
> > IN OUT UINTN *DescCount
> > );
> >
> > +/**
> > + This function returns the total number of PCIE controllers and an array
> > + with their base addresses.
> > +
> > + @param[in out] **PcieBaseAddresses Array containing PCIE controllers' base
>
> Extra space before "Array" messes up alignment.
> Either drop that or add one to the lines below.
>
That's an effect of :%s typo fixing... Will correct in v2.
Thanks,
Marcin
>
> > + adresses.
> > + @param[in out] *Count Total amount of available PCIE controllers.
> > +
> > + @retval EFI_SUCCESS The data were obtained successfully.
> > + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
> > + lack of resources.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +ArmadaSoCPcieGet (
> > + IN OUT EFI_PHYSICAL_ADDRESS **PcieBaseAddresses,
> > + IN OUT UINTN *Count
> > + );
> > +
> > //
> > // PP2 NIC devices SoC description
> > //
> > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> > index 355be64..4f8a59a 100644
> > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> > @@ -278,6 +278,50 @@ ArmadaSoCDescAhciGet (
> > return EFI_SUCCESS;
> > }
> >
> > +/**
> > + This function returns the total number of PCIE controllers and an array
> > + with their base addresses.
> > +
> > + @param[in out] **PcieBaseAddresses Array containing PCIE controllers' base
> > + adresses.
> > + @param[in out] *Count Total amount of available PCIE controllers.
> > +
> > + @retval EFI_SUCCESS The data were obtained successfully.
> > + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
> > + lack of resources.
> > +
> > +**/
> > +EFI_STATUS
> > +EFIAPI
> > +ArmadaSoCPcieGet (
> > + IN OUT EFI_PHYSICAL_ADDRESS **PcieBaseAddresses,
> > + IN OUT UINTN *Count
> > + )
> > +{
> > + UINTN CpCount, CpIndex, Index;
> > + EFI_PHYSICAL_ADDRESS *BaseAddress;
> > +
> > + CpCount = FixedPcdGet8 (PcdMaxCpCount);
> > +
> > + *Count = CpCount * MV_SOC_PCIE_PER_CP_COUNT;
> > + BaseAddress = AllocateZeroPool (*Count * sizeof (EFI_PHYSICAL_ADDRESS));
> > + if (BaseAddress == NULL) {
> > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > +
> > + *PcieBaseAddresses = BaseAddress;
> > +
> > + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> > + for (Index = 0; Index < MV_SOC_PCIE_PER_CP_COUNT; Index++) {
> > + *BaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_PCIE_BASE (Index);
> > + BaseAddress++;
> > + }
> > + }
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > EFI_STATUS
> > EFIAPI
> > ArmadaSoCDescPp2Get (
> > --
> > 2.7.4
> >
next prev parent reply other threads:[~2019-05-10 15:03 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-09 9:53 [edk2-platforms: PATCH 00/14] Armada7k8k PCIE support Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 01/14] Marvell/Library: MvGpioLib: Extend GPIO pin description Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 02/14] Marvell/Library: ArmadaSoCDescLib: Add PCIE information Marcin Wojtas
2019-05-10 14:59 ` Leif Lindholm
2019-05-10 15:03 ` Marcin Wojtas [this message]
2019-05-09 9:53 ` [edk2-platforms: PATCH 03/14] Marvell/Library: ArmadaBoardDescLib: " Marcin Wojtas
2019-05-16 13:57 ` Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 04/14] Marvell/Armada7k8k: Extend board description libraries with PCIE Marcin Wojtas
2019-05-09 10:16 ` Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 05/14] Marvell/Armada7k8k: MvBoardDesc: Extend protocol with PCIE support Marcin Wojtas
2019-05-16 13:53 ` Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 06/14] Marvell/Armada7k8k: Add PciExpressLib implementation Marcin Wojtas
2019-05-10 15:25 ` Leif Lindholm
2019-05-10 15:29 ` Marcin Wojtas
2019-05-16 14:02 ` Ard Biesheuvel
2019-05-16 14:26 ` Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 07/14] Marvell/Armada7k8k: Implement PciHostBridgeLib Marcin Wojtas
2019-05-10 15:50 ` Leif Lindholm
2019-05-12 11:41 ` Marcin Wojtas
2019-05-16 14:14 ` Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 08/14] Marvell/Armada7k8k: Enable PCIE support Marcin Wojtas
2019-05-16 14:16 ` Ard Biesheuvel
2019-05-16 14:22 ` Marcin Wojtas
2019-05-16 14:25 ` Ard Biesheuvel
2019-05-16 14:32 ` Leif Lindholm
2019-05-09 9:53 ` [edk2-platforms: PATCH 09/14] Marvell/Armada80x0McBin: Enable ACPI " Marcin Wojtas
2019-05-10 15:54 ` Leif Lindholm
2019-05-16 14:23 ` Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 10/14] Marvell/Armada80x0Db: " Marcin Wojtas
2019-05-16 14:25 ` [edk2-devel] " Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 11/14] Marvell/Armada70x0Db: " Marcin Wojtas
2019-05-16 14:26 ` [edk2-devel] " Ard Biesheuvel
2019-05-09 9:53 ` [edk2-platforms: PATCH 12/14] Marvell/Armada80x0McBin: DeviceTree: Use pci-host-generic driver Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 13/14] Marvell/Armada7k8k: Remove duplication in .dsc files Marcin Wojtas
2019-05-09 9:53 ` [edk2-platforms: PATCH 14/14] Marvell/Armada7k8: Add 'acpiview' shell command to build Marcin Wojtas
2019-05-10 15:58 ` [edk2-platforms: PATCH 00/14] Armada7k8k PCIE support Leif Lindholm
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