From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=OjM91AkH; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.222.195, mailfrom: mw@semihalf.com) Received: from mail-qk1-f195.google.com (mail-qk1-f195.google.com [209.85.222.195]) by groups.io with SMTP; Mon, 15 Apr 2019 20:14:47 -0700 Received: by mail-qk1-f195.google.com with SMTP id c189so11277234qke.6 for ; Mon, 15 Apr 2019 20:14:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=0Mvxr5ci5ZM8LRHQFLoBEFs9hvcKFFtUnpFJxPLMlv0=; b=OjM91AkHTSmPtJM/cJmGsFRxR+QtCNuA/x+nY57mqeJsyo5tJKzdXiWB92F/YR94M1 AAjLCq97voqSNrOCBJPqnDsEVSQaK0sEc8SdchzPVNm/wIs14yZ3LZAqMzZEBoW0i+p/ WbLTjzOK1lx5AVjkz7kLeSTEerI3bb2bFHaM6EMBSUSj3ZX8HfyBraibh0KQbEMEwo0S Pyj8zKRFtVo11pfc78dO6uDSKHguLvtE1Anvt8nUS7EuI6PLnrDkRFeqRTB/5y9tIjtz e48eFWl0awHmbe2a61v/zLZv79HGShZu/9c/XoSRuzYqttYmqiaOJvwhyN11CA8snFYf x+RQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=0Mvxr5ci5ZM8LRHQFLoBEFs9hvcKFFtUnpFJxPLMlv0=; b=ap4t4JM+hERzObiMB6K8us5E5DT9Y5wXlOhkrxNZ4pQeLM+Wn0EnmDemg6VT6LPMiO jVeSLOV0VDNe+L+sJtjpIdgmUnAiQpjY4a/jUM3OytPV+7vAwE08+uMpcgSgPO9JUN2q 2zcmZBC/gazmwkEaxDa79lH+yhHR7mWsyJYwFHUY7c6RsacGCMpNZBq3RDO8kG2z1N3I nDH0Rx4HVrVo8LpTdH/dYhqxNVPRjK/8SPP6xybREFPEIsIRL7Qiw6Yac8/C3OEDLLhF CHKuw7/5HyC8a2pTAKT4iS/sZOgFvaMVICya6SeNvrrc1TINili8x0MN1mdPYaW6yM7f 4E3w== X-Gm-Message-State: APjAAAUdlmezPo6n4d4DLTydJp1LeWop/d1gz1f1wnq+X6rtm8zv6ifC lhByLWQUXZjk6WSdRaJeuU1vfANScPgrB5Nnscgeh18J9hBL3g== X-Google-Smtp-Source: APXvYqwLmcRlZNDs+8Vz2d1wMM3M9v1b2Y1MqihP0JVP4tQgSDY9nXT/shZ15cxFMGCoO4Y94O4rBISGxtR++oEb5TM= X-Received: by 2002:ae9:eb4e:: with SMTP id b75mr61167778qkg.121.1555384485782; Mon, 15 Apr 2019 20:14:45 -0700 (PDT) MIME-Version: 1.0 References: <20190415224303.7369-1-ard.biesheuvel@linaro.org> <20190415224303.7369-4-ard.biesheuvel@linaro.org> In-Reply-To: <20190415224303.7369-4-ard.biesheuvel@linaro.org> From: "Marcin Wojtas" Date: Tue, 16 Apr 2019 05:14:34 +0200 Message-ID: Subject: Re: [edk2-devel] [PATCH edk2-platforms 3/3] Platform/MacchiatoBin: conditionally include the X64 PE/COFF emulator To: devel@edk2.groups.io, Ard Biesheuvel Cc: Leif Lindholm , Marcin Wojtas , Jeremy Linton Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, wt., 16 kwi 2019 o 00:43 Ard Biesheuvel napisa= = =C5=82(a): > > Add the X64 emulator to the build if '-D X64EMU_ENABLE=3DTRUE' is passed > on the build command line. Note that this only works on AARCH64 builds. > Also note that the edk2-non-osi repository needs to be listed in the > PACKAGES_PATH environment variable. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 1 + > Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc | 3 +++ > 2 files changed, 4 insertions(+) > > diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc b/Pla= tform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc > index d08013612ff7..0156c6edc8a5 100644 > --- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc > +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc > @@ -46,6 +46,7 @@ > FLASH_DEFINITION =3D Silicon/Marvell/Armada7k8k/Armada7= k8k.fdf > BOARD_DXE_FV_COMPONENTS =3D Platform/SolidRun/Armada80x0McBin/= Armada80x0McBin.fdf.inc > CAPSULE_ENABLE =3D TRUE > + X64EMU_ENABLE =3D FALSE Do we need to explicitly disable? It should be FALSE by default anyway. > > !include Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc b= /Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > index 254fcee3419c..ce3ed1bce82a 100644 > --- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > @@ -19,4 +19,7 @@ > > !if $(ARCH) =3D=3D AARCH64 > INF RuleOverride =3D ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/= Armada80x0McBin.inf > +!if $(X64EMU_ENABLE) =3D=3D TRUE > + INF Emulator/X86EmulatorDxe/X86EmulatorDxe.inf > +!endif > !endif While on it, could you please move it to Silicon/Marvell/Armada7k8k/Armada7k8k.fdf ? There will be PCIE slots enabled on other boards as well, so I'd prefer to keep this option common from the beginning. Thanks, Marcin > -- > 2.17.1 > > >=20 >