From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::234; helo=mail-it0-x234.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-it0-x234.google.com (mail-it0-x234.google.com [IPv6:2607:f8b0:4001:c0b::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1CBA421BADAB2 for ; Mon, 17 Sep 2018 08:00:17 -0700 (PDT) Received: by mail-it0-x234.google.com with SMTP id p129-v6so11301413ite.3 for ; Mon, 17 Sep 2018 08:00:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=GhUw+2m5b+LYF+jEXqPOTeTpOCU/hPakya2xfzxD/8I=; b=kHjo+BZNUbTt6gVV5rXQf3TSNgDtofYr4iNMduAqQw0m1LnMpTL7v9VoYP1jV274YT /WJ1f0tMdgj5gUFxTyo3uMLkVk4yhgsvcVmq6fn9j/2q41/HnLRBU+jxJ/Bd9NI8elwo sBXB5I4OOWtAqxOeCXMz1Hl1Q7jjv/CGQHEhu7Yf/CTsA72J2LW3t5t0aNhjYehzixP0 TK3vSr/1/vwNmFZpj37x2xcaVDcQ/V/62uPaLSo+t5eWLF4PEXmXb513+adGNcKEb4kz ek8wart6jb51+5l4VwYm7wKNQ9BvVO2Rgh/bha+M5Etv0eL2WmRL5ArkjF+lergiBbws pmPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=GhUw+2m5b+LYF+jEXqPOTeTpOCU/hPakya2xfzxD/8I=; b=O7dKR3OlAw8yoIqCJxBBfZpsrC+zC7gUWxDSgSmy4X2ChsN+lvmjW4SEOrM+2sItUp O9K7dXNV4zIOiUA8TVqLlT5PBWtMGWudksAgDfsaR6cBmTtoQqjCwFl5PHo4GXdOwDnb ZpvCcIFF3nSWWDyy5R/Ow/fHCwk40jmdBCToHFhSoRaWc/NL1oAJNw2LdLUSuiCrQ1Cr hiLrij0O8csKOlffWwb/iW8UvQ1QH6nKjXb5UdN0MSkUMIYzrCB10waNGdEwIq34SmAw TgMC1l7LjG+M5KXO2fp0rcyPaVkOA8M4qyqmXj9c2/zOZTdNT/gYWZ9K/LN9bASjyMF7 KYpw== X-Gm-Message-State: APzg51Cqm1VXli3HYQclOJwxKKmA0/bAvEOxYMhVSEZ1pRhi6pltAktd lxSepgFl1alh4rvmcT0PhE5cNAnb9c0HZXbjFyPxwg== X-Google-Smtp-Source: ANB0VdY6aG4Y3oq7StgINDv0jO6ZxB8e52mk47dmvo0ioUpws8gPA3I5KmJrtTUKhXDhbtZwNE/vCu14IlCKi15t4ho= X-Received: by 2002:a02:98a4:: with SMTP id q33-v6mr22908221jaj.55.1537196416104; Mon, 17 Sep 2018 08:00:16 -0700 (PDT) MIME-Version: 1.0 References: <1537050346-16445-1-git-send-email-mw@semihalf.com> <1537050346-16445-3-git-send-email-mw@semihalf.com> In-Reply-To: From: Marcin Wojtas Date: Mon, 17 Sep 2018 17:00:04 +0200 Message-ID: To: hao.a.wu@intel.com Cc: edk2-devel-01 , Tomasz Michalec , nadavh@marvell.com, "Gao, Liming" , "Kinney, Michael D" Subject: Re: [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Sep 2018 15:00:17 -0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Hao, pon., 17 wrz 2018 o 09:17 Wu, Hao A napisa=C5=82(a): > > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Marcin Wojtas > > Sent: Sunday, September 16, 2018 6:26 AM > > To: edk2-devel@lists.01.org > > Cc: Tian, Feng; tm@semihalf.com; Wu, Hao A; nadavh@marvell.com; Gao, > > Liming; Kinney, Michael D > > Subject: [edk2] [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix > > SdMmcHcReset to set only necesery bits > > > > From: Tomasz Michalec > > > > SdMmcHcReset used to set all bits of Software Reset Register to 1 > > including reserved ones. > > Hi, > > I did a quick search of the SD Host Controller Simplified Specification, = I > do not find the spec prohibit setting all the bits when performing a rese= t > for the host controller. > > Do you met with issues during the controller reset with the current logic= ? > Yes, with SwResetMask =3D 0xFF, on all my boards (regardless speed), SdMmcHcWaitMmioSet times out on each interface. With SwReset =3D SD_MMC_HC_SW_RST_ALL it's all ok. Best regards, Marcin > Best Regards, > Hao Wu > > > > > Now only first bit is set which means "Software Reset for All". > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Marcin Wojtas > > --- > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 5 +++++ > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 6 +++--- > > 2 files changed, 8 insertions(+), 3 deletions(-) > > > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h > > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h > > index e389d52..bcc31bd 100644 > > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h > > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h > > @@ -63,6 +63,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > > KIND, EITHER EXPRESS OR IMPLIED. > > #define SD_MMC_HC_CTRL_VER 0xFE > > > > // > > +// SD Software Reset Register bits description > > +// > > +#define SD_MMC_HC_SW_RST_ALL BIT0 > > + > > +// > > // The transfer modes supported by SD Host Controller > > // Simplified Spec 3.0 Table 1-2 > > // > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > > index 9672b5b..9d9bca8 100644 > > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > > @@ -454,8 +454,8 @@ SdMmcHcReset ( > > } > > > > PciIo =3D Private->PciIo; > > - SwReset =3D 0xFF; > > - Status =3D SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, siz= eof > > (SwReset), &SwReset); > > + SwReset =3D SD_MMC_HC_SW_RST_ALL; > > + Status =3D SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof > > (SwReset), &SwReset); > > > > if (EFI_ERROR (Status)) { > > DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Sta= tus)); > > @@ -467,7 +467,7 @@ SdMmcHcReset ( > > Slot, > > SD_MMC_HC_SW_RST, > > sizeof (SwReset), > > - 0xFF, > > + SD_MMC_HC_SW_RST_ALL, > > 0x00, > > SD_MMC_HC_GENERIC_TIMEOUT > > ); > > -- > > 2.7.4 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel