From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qt1-f193.google.com (mail-qt1-f193.google.com [209.85.160.193]) by mx.groups.io with SMTP id smtpd.web11.621.1570728384185588390 for ; Thu, 10 Oct 2019 10:26:24 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=Lnsk83aw; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.160.193, mailfrom: mw@semihalf.com) Received: by mail-qt1-f193.google.com with SMTP id r5so9887393qtd.0 for ; Thu, 10 Oct 2019 10:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ydezrntjuwj4iuV1fqzLjljfMf7UiKUcMNL0c/y/ons=; b=Lnsk83awXeiNnn44tgbwHBd+QZ+e7rENxhpJHUNC+zvokOIxqBIRiHYXAjPvvgZrND Bn1/AbGPQaNq2dHtY8XwYJWtveMdIunL9Xoxf8YiXlNmbufIwhTdr6ARKqn2S2M6BfjI cIdjUamiajl+wFp/G9QRGLmikspd+5VrhG2ItBdGTHLUHr2pgzRDA5A39zAL/36Kascd /9snJqse+hntScFxXLfqB0M5jI0mT2BooCJszqLJdKIFT03aDemEZQSqD1eRTGF0EjkH 3mmKN3iegdBd9V9GEj21NY6Gps87DT0Ca8ZwgMTrF9aqF19TwX52BlwS3VKlQWXqh76N 6DbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ydezrntjuwj4iuV1fqzLjljfMf7UiKUcMNL0c/y/ons=; b=N6Z7Li9S6MoLzscZZm9NXvnxkjLgdNbZIvjJusEVu5hm2i7wReEegLIrAQUfFTFoQS UbqQ1C52+UR4cZMICqscfp7AdcAPDz8FUyb0JzFDbdiGPowxApCKBjM2VwqGGX+dJMDB v+7359QThyQERIdv3ELD3RS5sJV0l4Q+o9ZLz5x7kQkz6fXdl4BpPImxiGWxc/aMALOC mEik385U1VwYS+5vgLU8gAmICm6Vk9kQasy6VieQioGhwcRw2lcDwuGj1aer99Aq2KDs GZJPutRlYKd5z420MP5sjCy5IIJ6d3Obx/0TuiNe2uie9NPguK4Rq+C80Wn2emupqt25 JUxA== X-Gm-Message-State: APjAAAXBcZ0mUvvFDh0iB1dQnA2wYyPkVrwuohIaQxX9a+H3y3q+tFlI /5LXFYbCUQWcl0CqvI2qikuBmJN/iGQ4E9eJPR2/Bw== X-Google-Smtp-Source: APXvYqyzUbpzX9+UR84B5s5Q66ZXYAzWYlcFe3rhJd5D4A2gjLBD50iRFdgDQh6+gwy8izYgv478cuy76SK7p9U4YmI= X-Received: by 2002:ac8:33d4:: with SMTP id d20mr11573789qtb.204.1570728383192; Thu, 10 Oct 2019 10:26:23 -0700 (PDT) MIME-Version: 1.0 References: <1570686078-25140-1-git-send-email-mw@semihalf.com> <20191010165947.GQ25504@bivouac.eciton.net> In-Reply-To: <20191010165947.GQ25504@bivouac.eciton.net> From: "Marcin Wojtas" Date: Thu, 10 Oct 2019 19:26:14 +0200 Message-ID: Subject: Re: [edk2-non-osi: PATCH 0/3] Marvell CN913x device tree To: Leif Lindholm Cc: edk2-devel-groups-io , Ard Biesheuvel , "jsd@semihalf.com" , Grzegorz Jaszczyk , Kostya Porotchkin Content-Type: multipart/alternative; boundary="00000000000051b243059491b384" --00000000000051b243059491b384 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable czw., 10 pa=C5=BA 2019 o 18:59 Leif Lindholm napisa=C5=82(a): > On Thu, Oct 10, 2019 at 07:41:15AM +0200, Marcin Wojtas wrote: > > Hi, > > > > As agreed, due to the licencing concerns (GPL/MIT), it is > > better to keep the device trees for newly added SoC family > > in edk2-non-osi. > > > > For convenience, the patches are available in the public > > github branch: > > > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/c= n913x-dt-upstream-r20191009 > > > > I'm looking forward to your comments or remarks. > > For the series: > Reviewed-by: Leif Lindholm > Pushed as 0aeb376e96..fabc1df61a. > > Thanks! Best regards, Marcin > > > Best regards, > > Marcin > > > > Marcin Wojtas (3): > > Marvell/Cn9130Db: Add DeviceTree > > Marvell/Cn9131Db: Add DeviceTree > > Marvell/Cn9132Db: Add DeviceTree > > > > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.inf | 22 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.inf | 22 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi | 43 += + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi | 264 > ++++++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi | 10 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi | 552 > ++++++++++++++++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts | 185 > +++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi | 168 > ++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi | 126 > +++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts | 29 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi | 175 > +++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts | 70 += ++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi | 159 > ++++++ > > 14 files changed, 1847 insertions(+) > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.i= nf > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.i= nf > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.i= nf > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts > > create mode 100644 > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi > > > > -- > > 2.7.4 > > > --00000000000051b243059491b384 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

czw., 10 pa=C5=BA 2019 o 18:59=C2=A0Leif = Lindholm <= leif.lindholm@linaro.org> napisa=C5=82(a):
On Thu, Oct 10, 2019 at 07:41:15AM +0200,= Marcin Wojtas wrote:
> Hi,
>
> As agreed, due to the licencing concerns (GPL/MIT), it is
> better to keep the device trees for newly added SoC family
> in edk2-non-osi.
>
> For convenience, the patches are available in the public
> github branch:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commit= s/cn913x-dt-upstream-r20191009
>
> I'm looking forward to your comments or remarks.

For the series:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Pushed as 0aeb376e96..fabc1df61a.


T= hanks!

Best regards,
Marcin
= =C2=A0

> Best regards,
> Marcin
>
> Marcin Wojtas (3):
>=C2=A0 =C2=A0Marvell/Cn9130Db: Add DeviceTree
>=C2=A0 =C2=A0Marvell/Cn9131Db: Add DeviceTree
>=C2=A0 =C2=A0Marvell/Cn9132Db: Add DeviceTree
>
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 22 +
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.inf=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 22 +
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.inf=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 22 +
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi |= =C2=A0 43 ++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi=C2=A0 = =C2=A0 =C2=A0 | 264 ++++++++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi=C2=A0= =C2=A0 =C2=A0|=C2=A0 10 +
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi=C2=A0 = =C2=A0 =C2=A0 | 552 ++++++++++++++++++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts=C2=A0 = =C2=A0 =C2=A0 =C2=A0 | 185 +++++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0| 168 ++++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi=C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 | 126 +++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts=C2=A0 = =C2=A0 =C2=A0 =C2=A0 |=C2=A0 29 +
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0| 175 +++++++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts=C2=A0 = =C2=A0 =C2=A0 =C2=A0 |=C2=A0 70 +++
>=C2=A0 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0| 159 ++++++
>=C2=A0 14 files changed, 1847 insertions(+)
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn913= 0DbA.inf
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn913= 1DbA.inf
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn913= 2DbA.inf
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armad= a-ap806-quad.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armad= a-ap806.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armad= a-common.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armad= a-cp110.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 0-db-A.dts
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 0-db.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 0.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 1-db-A.dts
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 1-db.dtsi
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 2-db-A.dts
>=C2=A0 create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn913= 2-db.dtsi
>
> --
> 2.7.4
>
--00000000000051b243059491b384--