From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2607:f8b0:4864:20::142; helo=mail-it1-x142.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-it1-x142.google.com (mail-it1-x142.google.com [IPv6:2607:f8b0:4864:20::142]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A5F4F2194D3AE for ; Mon, 21 Jan 2019 07:35:59 -0800 (PST) Received: by mail-it1-x142.google.com with SMTP id g76so16893691itg.2 for ; Mon, 21 Jan 2019 07:35:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=EI15XPQ+WYjIGMR+S9AMCqhwQkTMFngq98bvjVPlhq8=; b=v07b8KUOkI8lsc1uB3HKbcdJaSX8qWWFJzf++5T3N2p9jvBUTFBVuWk+I+FRxkkJDt 3PaeYgaxrl/o0Tb+8AcCuGwV+9Gm1vKzsYsr3uUJdSG/22iCg/zZPU3pQvOc2Cgj55fJ l7Gp20VCHW9Fa9UWto6pNoKKcXI94oMgbUhR2XFs761i+oJf1TvLhOeLvk7fOZhO6wn+ 2K7xFxQxSKN5KxD9BXh89bVJftuGccPM4ZOuOacfJxs54P7+w0PK5dSrqXcSOrc+AkjU Ez+p0X2UR7X4b3FapBTojaS7JegvpfHE+6/xkp5pneGRLSWLpRQuPnCO6JnXFmpu80ar UzaQ== X-Google-DKIM-Signature: v=1; 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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Leif, pon., 21 sty 2019 o 12:32 Leif Lindholm napisa= =C5=82(a): > > On Mon, Jan 21, 2019 at 11:52:10AM +0100, Marcin Wojtas wrote: > > From: Grzegorz Jaszczyk > > > > For upcomming patch there is need to get AP806 base, provide required > > getter function for it. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Marcin Wojtas > > --- > > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCD= escLib.h | 1 + > > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h = | 10 ++++++++++ > > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCD= escLib.c | 17 +++++++++++++++++ > > 3 files changed, 28 insertions(+) > > > > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Ar= mada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDesc= Lib/Armada7k8kSoCDescLib.h > > index bfc8639..6caee6c 100644 > > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8= kSoCDescLib.h > > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8= kSoCDescLib.h > > @@ -22,6 +22,7 @@ > > // Common macros > > // > > #define MV_SOC_CP_BASE(Cp) (0xF2000000 + ((Cp) * 0x20000= 00)) > > +#define MV_SOC_AP806_BASE 0xF0000000 > > #define MV_SOC_AP806_COUNT 1 > > > > // > > diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silic= on/Marvell/Include/Library/ArmadaSoCDescLib.h > > index 26b075a..7aec9be 100644 > > --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > > +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > > @@ -20,6 +20,16 @@ > > #include > > > > // > > +// North Bridge description > > +// > > +EFI_STATUS > > +EFIAPI > > +ArmadaSoCAp8xxBaseGet ( > > + IN OUT UINT64 *ApBase, > > + IN UINTN ApIndex > > + ); > > + > > +// > > // ComPhy SoC description > > // > > typedef struct { > > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Ar= mada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDesc= Lib/Armada7k8kSoCDescLib.c > > index 5b72c20..089ac2d 100644 > > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8= kSoCDescLib.c > > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8= kSoCDescLib.c > > @@ -30,6 +30,23 @@ > > > > As I said, I was going to get stricter about adding function > description comments - please add one here. (And clone it to > ArmadaSoCDescLib.h, for the obious place to go look for a template > when implementing a variant for a new platform.) Sure, I will add it. > > > EFI_STATUS > > EFIAPI > > +ArmadaSoCAp8xxBaseGet ( > > + IN OUT UINT64 *ApBase, > > + IN UINTN ApIndex > > + ) > > +{ > > + if (ApIndex !=3D 0) { > > This test should be using ARMADA7K8K_AP806_INDEX, and that definition > should be added to this patch. > Ok. Thanks, Marcin > > + DEBUG ((DEBUG_ERROR, "%a: Only one AP806 in A7K/A8K SoC\n", __FUNC= TION__)); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + *ApBase =3D MV_SOC_AP806_BASE; > > + > > + return EFI_SUCCESS; > > +} > > + > > +EFI_STATUS > > +EFIAPI > > ArmadaSoCDescComPhyGet ( > > IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc, > > IN OUT UINTN *DescCount > > -- > > 2.7.4 > >