From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::242; helo=mail-it0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-it0-x242.google.com (mail-it0-x242.google.com [IPv6:2607:f8b0:4001:c0b::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8B62F2034EE2E for ; Sun, 5 Nov 2017 00:47:18 -0700 (PDT) Received: by mail-it0-x242.google.com with SMTP id 72so1864941itk.3 for ; Sun, 05 Nov 2017 00:51:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=f01QcH1zuK1SErS1Al9EL2VEbMc8Mi7AABller18DsI=; b=kIi8AOwvOiLVCz6O48ULIMwPu2lHybQMDI8JkgdLkHzXcUlpRf7BgaG4Dbj7Ttyeag DLzhNtKaU4lkxiCmJ56j7iyC2xfJZCYnsnbFEWJzZ9YDoCxXDAJUARK51QnIXOwtcgQF 4DKCEcFZOmaMbLKtB1OM95/t7s4vntJVEfGGVbz0GzRUMwTbxkFVvsasUTR0TCXSEOTm m8gUQlTr/K2ixof50/gbnuqmdR+cPjOGDIFhFHpfJkFgRo8R72fh0Am4NhsG4t0hCjGE pyRSCqSm7kd1Nsu6nc9MrTuycEixLGw8Sts9uC7B2EXagYAmVS4UsLaQEgC3Zg2LbCfN F3wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=f01QcH1zuK1SErS1Al9EL2VEbMc8Mi7AABller18DsI=; b=kk2zsBJIfm0TqRzNcjnvpmNYecmMHSKW3gpKpatamSHWeL2E9uVtojsX+INnPl2gEW HNECMe/cTrf6BslIVHiQ5WxsYhauNcXCRTaLOnZ0Psq/nZgstUEe+A3lguY+t8shapPB UIpomTjRaInkeaL9GVV7QSKeY1KqLsKOzUrCZjZN4KALcC5rF3Ji5tcv/nTmrJUQtP77 qhY3Nn7+W0/zZ1qQ0eWoSRYqZAfhTTtrRZT2LN6FqSZRYZB+S8HTBDH/ZDTGZV3mVRul bP+HBHipn8Wq+dg5yxg2z85zng9xJC5hK6BuAwO3Np85/pZxWL/37uQoDm42tbeJAYSv UoJg== X-Gm-Message-State: AJaThX4HLpcyH8Ut7IKB2gmND93fZzqYH4CDLA3RsrQV6B4rJ2t+F34S CjTslyPtLGZWsT6NjglxwCzdoUq9VkOXzKX1Oay6Jw== X-Google-Smtp-Source: ABhQp+SYcd/q9PQUAWzqelCgHWcR931TfuDDYxcXkDT4n8Gxo2+pXiEuFMrY8L9/PaWyXUUXmyGQLmDSTz2cwcFHqYA= X-Received: by 10.36.197.130 with SMTP id f124mr4596765itg.99.1509868274628; Sun, 05 Nov 2017 00:51:14 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.167.208 with HTTP; Sun, 5 Nov 2017 00:51:14 -0700 (PDT) In-Reply-To: <20171105061332.fnw7il63ywo3u3wa@bivouac.eciton.net> References: <1509731835-5664-1-git-send-email-mw@semihalf.com> <20171105061332.fnw7il63ywo3u3wa@bivouac.eciton.net> From: Marcin Wojtas Date: Sun, 5 Nov 2017 08:51:14 +0100 Message-ID: To: Leif Lindholm Cc: edk2-devel-01 , Ard Biesheuvel , nadavh@marvell.com, Neta Zur Hershkovits , Kostya Porotchkin , Hua Jing , semihalf-dabros-jan Subject: Re: [platforms: PATCH v2 0/6] Armada 7k/8k SPI improvements pt 2. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Nov 2017 07:47:18 -0000 Content-Type: text/plain; charset="UTF-8" Hi Leif, 2017-11-05 7:13 GMT+01:00 Leif Lindholm : > On Fri, Nov 03, 2017 at 06:57:09PM +0100, Marcin Wojtas wrote: >> Hi, >> >> I submit corrected version of the Armada SPI improvements >> after the first round of review. There were no significant changes >> comparing to v1, please check the changelog below for the details. >> >> Patches are available in the github: >> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20171103 >> NorFlashInfoLib: >> https://github.com/MarvellEmbeddedProcessors/edk2/commits/norlib-upstream-r20171103 >> >> I'm looking forward to the comments or remarks. > > For the series: > Reviewed-by: Leif Lindholm > > I'll push it (and send an email about it) when I'm not just about to > jump on a plane. Kick me if you haven't seen anything by end of > Monday. > > / Thanks. However the patches are depending on the NorFlashInfoLib - it has to be merged first, otherwise we will break compilation. Do you think there is a chance of that happening? Best regards, Marcin > Leif > >> Best regards, >> Marcin >> >> Changelog: >> v1 -> v2 >> 1/6 >> - Replace NOR_FLASH_ID_DEFAULT_LEN with PcdGetSize (PcdSpiFlashId) >> >> 2/6 >> - Adjust to renamed functions and macros according to NorFlashInfoLib v2 >> - Restore handling of CMD_ERASE_32K >> - Check NOR_FLASH_4B_ADDR only once and use SPI_DEVICE structure instead >> >> 3/6 >> - Improve commit log >> >> 4/6 >> - Use global variable explicitly (mSlave) >> >> 5/6 >> - Use NOR_FLASH_ID_SPANSION from EmbeddedPkg/Include/Library/NorFlashInfoLib.h >> >> 6/6 >> - Add RB >> >> Marcin Wojtas (6): >> Marvell/Drivers: MvSpiFlash: Improve ReadId >> Marvell/Drivers: MvSpiFlash: Enable dynamic SPI Flash detection >> Marvell/Drivers: MvSpiFlash: Remove duplicated macros >> Marvell/Applications: SpiTool: Do not override existing slave device >> Marvell/Drivers: MvSpiFlash: Fix bank selection for Spansion >> Marvell/Drivers: MvSpiDxe: Keep data in SPI_DEVICE structure >> >> Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c | 25 +---- >> Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf | 4 +- >> Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c | 57 ++++------ >> Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf | 2 +- >> Platform/Marvell/Armada/Armada.dsc.inc | 1 + >> Platform/Marvell/Armada/Armada70x0.dsc | 5 - >> Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 116 ++++++++++---------- >> Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h | 3 + >> Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf | 9 +- >> Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 63 ++++++----- >> Platform/Marvell/Drivers/Spi/MvSpiDxe.h | 1 + >> Platform/Marvell/Drivers/Spi/MvSpiDxe.inf | 2 + >> Platform/Marvell/Include/Protocol/Spi.h | 7 ++ >> Platform/Marvell/Include/Protocol/SpiFlash.h | 14 +-- >> Platform/Marvell/Marvell.dec | 6 - >> Silicon/Marvell/Documentation/PortingGuide.txt | 18 --- >> 16 files changed, 142 insertions(+), 191 deletions(-) >> >> -- >> 2.7.4 >>