From: Marcin Wojtas <mw@semihalf.com>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: edk2-devel-01 <edk2-devel@lists.01.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
nadavh@marvell.com, "jsd@semihalf.com" <jsd@semihalf.com>,
Grzegorz Jaszczyk <jaz@semihalf.com>,
Kostya Porotchkin <kostap@marvell.com>
Subject: Re: [platforms: PATCH v2 1/4] Marvell/Armada7k8k: Shift PEI stack base
Date: Wed, 23 Jan 2019 09:28:40 +0100 [thread overview]
Message-ID: <CAPv3WKeWOFaCKbe5KVp2oaGOcofR8P1=WjJrcuTM9bpY3=eV1Q@mail.gmail.com> (raw)
In-Reply-To: <20190122210937.rf44pvv6gaudlme7@bivouac.eciton.net>
Hi Leif,
wt., 22 sty 2019 o 22:10 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
>
> On Tue, Jan 22, 2019 at 09:56:14PM +0100, Marcin Wojtas wrote:
> > > > > I think I gave my suggestion for the resolution of this problem (with
> > > > > moving StackBase to 0x05400000 as the alternative) in my previous
> > > > > reply.
> > > > >
> > > >
> > > > Yes, and I answered, presenting the alternative memory map with
> > > > additional 64kB "cut out" on top of 20MB "hole" of memory, which I'm
> > > > not fancy, given available space inside the 20MB chunk.
> > >
> > > Please go back and reread my first and my second email.
> > > Then please point out where I have, other than as an alternative
> > > solution, suggested growing the cutout size.
> > >
> > > Then perhaps we can rewind this conversation and try again?
> >
> > Ok. So would it be sufficient to replace
> > gMarvellTokenSpaceGuid.PcdSecureRegionBase with two sets of separate
> > PCDs for ARM-TF runtime services and OPTEE leaving the PEI stack base
> > @0x43f0000?
>
> That would be lovely, thank you :)
>
> (Although your reference to wanting to keep the PEI stack area out of
> the hands of the operating system might mean that you want three? I'll
> leave that to your discretion.)
>
PEI stack has its own PCDs:
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
I want to keep it simple (and btw aligned with U-Boot booting the
mainline DTB with single 20MB reserved memory area), so what I intend
to do is to limit reserved region in Armada7k8kMemoryInitPeiLib.c with
PcdArmTFRegionBase (@0x4000000) up to PcdOpteeRegionBase +
PcdOpteeRegionSize (@0x5400000).
Best regards,
Marcin
next prev parent reply other threads:[~2019-01-23 8:28 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-22 1:32 [platforms: PATCH v2 0/4] Armada7k8k memory handling update Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 1/4] Marvell/Armada7k8k: Shift PEI stack base Marcin Wojtas
2019-01-22 17:26 ` Leif Lindholm
2019-01-22 18:26 ` Marcin Wojtas
2019-01-22 19:06 ` Leif Lindholm
2019-01-22 19:27 ` Marcin Wojtas
2019-01-22 20:26 ` Leif Lindholm
2019-01-22 20:56 ` Marcin Wojtas
2019-01-22 21:09 ` Leif Lindholm
2019-01-23 8:28 ` Marcin Wojtas [this message]
2019-01-23 9:42 ` Leif Lindholm
2019-01-23 9:45 ` Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 2/4] Marvell/Library: Introduce common header for the SMC ID's Marcin Wojtas
2019-01-22 17:35 ` Leif Lindholm
2019-01-22 18:15 ` Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 3/4] Marvell/Library: ArmadaSoCDescLib: Add North Bridge description Marcin Wojtas
2019-01-22 17:38 ` Leif Lindholm
2019-01-22 1:32 ` [platforms: PATCH v2 4/4] Marvell/Armada7k8k: Read DRAM settings from ARM-TF Marcin Wojtas
2019-01-22 17:39 ` Leif Lindholm
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