From: "Marcin Wojtas" <mw@semihalf.com>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
edk2-devel-groups-io <devel@edk2.groups.io>,
Leif Lindholm <leif@nuviainc.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Grzegorz Jaszczyk <jaz@semihalf.com>,
Grzegorz Bernacki <gjb@semihalf.com>,
upstream@semihalf.com, Jon Nettleton <jon@solid-run.com>
Subject: Re: [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables
Date: Fri, 30 Jul 2021 11:57:05 +0200 [thread overview]
Message-ID: <CAPv3WKecvMe+0a3UmLTiFTQn3omh8d4Fi2LpcLmp=WK1iC1QDQ@mail.gmail.com> (raw)
In-Reply-To: <CAMj1kXG5xnPVFDojE5muXkmpj+gBrV6k8+nUswx7+QtLP2sKwQ@mail.gmail.com>
Hi Ard,
czw., 29 lip 2021 o 11:58 Ard Biesheuvel <ardb@kernel.org> napisał(a):
>
> On Thu, 29 Jul 2021 at 11:46, Marcin Wojtas <mw@semihalf.com> wrote:
> >
> > Hi Ard,
> >
> > pon., 19 lip 2021 o 17:06 Marcin Wojtas <mw@semihalf.com> napisał(a):
> > >
> > > Hi Ard,
> > >
> > > pon., 19 lip 2021 o 11:54 Ard Biesheuvel <ardb@kernel.org> napisał(a):
> > > >
> > > > On Mon, 19 Jul 2021 at 11:31, Marcin Wojtas <mw@semihalf.com> wrote:
> > > > >
> > > > > BBR 1.0 spec says that _STA is required for each device in DSDT or SSDT.
> > > > > Fix that for all platforms with the Marvell SoC's.
> > > > >
> > > >
> > > > Can we fix the BBR instead? If ACPI itself does not require _STA, BBR
> > > > should not require it either.
> > > >
> > > >
> > >
> > > I consulted with ARM on the matter. SBBR has requirements of things
> > > that are otherwise optional in UEFI/ACPI/SMBIOS. Also some OS's may
> > > require that and I can see those methods in most of the other ACPI
> > > source files in the edk2-platfoms tree. I think the BBR requirements
> > > discussions can follow, but it would be great if this change can be
> > > applied, so that no to block other development.
> > >
> >
> > Do you have any feedback to the patchset and the _STA methods concerns?
> >
>
> Yes. I would like to understand why _STA methods are now mandated by BBR.
>
Understood. Providing an answer may not be immediate and may possibly
require further discussion on the SystemArchAC level.
How about we withdraw this single patch for now and process the
remaining ones? We would come back to the _STA subject, as soon as
there's more information available.
Best regards,
Marcin
>
> > >
> > > >
> > > > > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > > > > ---
> > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 +++++++++++++++
> > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 76 ++++++++++++++++++++
> > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 72 +++++++++++++++++++
> > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 12 ++++
> > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 56 +++++++++++++++
> > > > > 5 files changed, 272 insertions(+)
> > > > >
> > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> > > > > index 345c1e4dd6..88e38efeeb 100644
> > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x000) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU1)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x001) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU2)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x100) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x101) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > >
> > > > > Device (AHC0)
> > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0001") // _HID: Hardware ID
> > > > > Name (_CID, "HISI0031") // _CID: Compatible ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0100") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> > > > > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> > > > > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > > > > Name (_SEG, 0x00) // _SEG: PCI Segment
> > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_PRT, Package () // _PRT: PCI Routing Table
> > > > > {
> > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> > > > > index 91401c74c8..77d3aebaf1 100644
> > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
> > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x000) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU1)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x001) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU2)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x100) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x101) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > >
> > > > > Device (AHC0)
> > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x02) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0001") // _HID: Hardware ID
> > > > > Name (_CID, "HISI0031") // _CID: Compatible ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0100") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> > > > > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0100") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> > > > > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> > > > > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D)
> > > > > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_SEG, 0x00) // _SEG: PCI Segment
> > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_PRT, Package () // _PRT: PCI Routing Table
> > > > > {
> > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > > > > index d26945d933..1ecbd0309c 100644
> > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > > > > @@ -19,21 +19,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x000) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU1)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x001) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU2)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x100) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x101) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > >
> > > > > Device (AHC0)
> > > > > @@ -41,6 +57,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -91,6 +111,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -122,6 +146,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -150,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -169,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -188,6 +224,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x02) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -206,6 +246,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0001") // _HID: Hardware ID
> > > > > Name (_CID, "HISI0031") // _CID: Compatible ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -232,6 +276,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0100") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -249,6 +297,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0101") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -283,6 +335,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> > > > > @@ -322,6 +378,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> > > > > @@ -400,6 +460,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> > > > > @@ -420,6 +484,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D)
> > > > > @@ -446,6 +514,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > > > > Name (_SEG, 0x00) // _SEG: PCI Segment
> > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_PRT, Package () // _PRT: PCI Routing Table
> > > > > {
> > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> > > > > index 8377b13763..d6619e367b 100644
> > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> > > > > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x02) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
> > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> > > > > index d76a2a902b..536df8ab4b 100644
> > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x000) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU1)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x001) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU2)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x100) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > > Device (CPU3)
> > > > > {
> > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > > > > Name (_UID, 0x101) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > }
> > > > >
> > > > > Device (AHC0)
> > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CLS, Package (0x03) // _CLS: Class Code
> > > > > {
> > > > > 0x01,
> > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "MRVL0003") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -98,6 +122,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -126,6 +154,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -145,6 +177,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID
> > > > > Name (_UID, 0x01) // _UID: Unique ID
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > >
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -163,6 +199,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0001") // _HID: Hardware ID
> > > > > Name (_CID, "HISI0031") // _CID: Compatible ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > > > > {
> > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > {
> > > > > Name (_HID, "MRVL0100") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite,
> > > > > @@ -211,6 +255,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_HID, "MRVL0110") // _HID: Hardware ID
> > > > > Name (_CCA, 0x01) // Cache-coherent controller
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> > > > > @@ -289,6 +337,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > {
> > > > > Name (_HID, "PRP0001") // _HID: Hardware ID
> > > > > Name (_UID, 0x00) // _UID: Unique ID
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_CRS, ResourceTemplate ()
> > > > > {
> > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> > > > > @@ -315,6 +367,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> > > > > Name (_SEG, 0x00) // _SEG: PCI Segment
> > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number
> > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > > > > + Method (_STA) // _STA: Device status
> > > > > + {
> > > > > + Return (0xF)
> > > > > + }
> > > > > Name (_PRT, Package () // _PRT: PCI Routing Table
> > > > > {
> > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 },
> > > > > --
> > > > > 2.29.0
> > > > >
next prev parent reply other threads:[~2021-07-30 9:57 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-19 9:30 [edk2-platforms PATCH 0/7] Marvell ACS improvements Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 1/7] Marvell: Armada7k8k: Add missing VariablePolicyHelperLib resolution Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables Marcin Wojtas
2021-07-19 9:54 ` Ard Biesheuvel
2021-07-19 15:06 ` Marcin Wojtas
2021-07-29 9:46 ` Marcin Wojtas
2021-07-29 9:57 ` Ard Biesheuvel
2021-07-30 9:57 ` Marcin Wojtas [this message]
2021-08-01 16:58 ` Ard Biesheuvel
2021-08-10 14:36 ` Samer El-Haj-Mahmoud
2021-08-10 14:41 ` [edk2-devel] " Ard Biesheuvel
2021-08-10 15:01 ` Samer El-Haj-Mahmoud
2021-08-10 22:12 ` Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 3/7] Marvell/Cn913xDbA: AcpiTables: Introduce DBG2 table Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 4/7] SolidRun/Armada80x0McBin: " Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 5/7] Marvell: Armada7k8k/OcteonTx: Switch to MonotonicCounterRuntimeDxe Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 6/7] Marvell/Drivers: SmbiosPlatformDxe: Update Type0 information Marcin Wojtas
2021-07-19 9:30 ` [edk2-platforms PATCH 7/7] Marvell: Armada7k8k/OcteonTx: Bump firmware to "EDK2 SH 1.0" revision Marcin Wojtas
2021-08-01 17:14 ` [edk2-platforms PATCH 0/7] Marvell ACS improvements Ard Biesheuvel
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