From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qt1-f180.google.com (mail-qt1-f180.google.com [209.85.160.180]) by mx.groups.io with SMTP id smtpd.web11.21988.1627639038228960358 for ; Fri, 30 Jul 2021 02:57:18 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=1yKb7GnL; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.160.180, mailfrom: mw@semihalf.com) Received: by mail-qt1-f180.google.com with SMTP id g11so5975968qts.11 for ; Fri, 30 Jul 2021 02:57:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=A9gsSAohwV2TktZ/BREs8NuyYeLHrrnoSQiYKQFrw0M=; b=1yKb7GnLioD8zsrN6Lr3yECBLlqsXS27Ce6ELjXS6p9wb4XRTJ7Nn+eUX41aB5UUvw YSojNKq3pSphvspvOpwxV/54ccl908K+LwZ6pd22DDmfPzleP+1aGQONRG20XH7XA3tA c5bDHCppQgBJQzknNwbicOXDFwK9Er9UE4Etg7DHs/6XIKOXFOm8bg3U7ngksGw9SC6d VgH1+b2zP++rgmHPRM5AhDgaif0CsQHTE/KoEWtVdXySygwRmDxZ/9jVRkQrhyh0z5eb dHIVtXnr1gurHshcrjljimASqRIvs8sKxVt6WsiCyuwvJpKUtSGghmCtT+LdKSMfbx6N PgyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=A9gsSAohwV2TktZ/BREs8NuyYeLHrrnoSQiYKQFrw0M=; b=pCCkII1ik6dRVTG1Nqw0FklQM0mlViAyGY+FErHg6Hy6bh3Qffpm9iOpHS4547Dum7 rURtDW0jOrcyUWuR59/X3rjFrlAsU0DqCTjM/G1emPfHaxqq5QOHhonpfoxJzHPLc3Sq on9E6Pcczh4mEmwDTyxH1IIw97pqT+cy9fAlEe05Kdp72t1Y+bjvs2x7OGism6K2DuV/ zQ1hD6MYEsgfziiYoCQlt1eP/0V/Z5iTs/+SjPkBTdvQnM2rd5LB06FNbMGtDBh3BeyX h8HlaoAl5H8OG43VnEksj8uqS6E2EzRnsukCA7hEf6s+1TgL2vSXFBT4FO5cel4moGqL BqFw== X-Gm-Message-State: AOAM5305p/xqQO2l0AwqYk7IuQ4LlQEqYaQ+ADLiPaHnaxeAIowf2Mv8 9NI+ACwhFh5q6oBzqleqOI7wPkY0XWGVoJx63bEhWQ== X-Google-Smtp-Source: ABdhPJyT7CPLiBBRHlEjF7TTXCRYrVJG5DSoKVRRSA7RosTU1jhgqT/ySrDZqs5MJLIky2hkdtHfVgLOhyKnzyL+7JQ= X-Received: by 2002:ac8:58d3:: with SMTP id u19mr1594442qta.306.1627639036873; Fri, 30 Jul 2021 02:57:16 -0700 (PDT) MIME-Version: 1.0 References: <20210719093015.1490932-1-mw@semihalf.com> <20210719093015.1490932-3-mw@semihalf.com> In-Reply-To: From: "Marcin Wojtas" Date: Fri, 30 Jul 2021 11:57:05 +0200 Message-ID: Subject: Re: [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables To: Ard Biesheuvel Cc: Samer El-Haj-Mahmoud , edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , upstream@semihalf.com, Jon Nettleton Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, czw., 29 lip 2021 o 11:58 Ard Biesheuvel napisa=C5=82(a): > > On Thu, 29 Jul 2021 at 11:46, Marcin Wojtas wrote: > > > > Hi Ard, > > > > pon., 19 lip 2021 o 17:06 Marcin Wojtas napisa=C5=82(= a): > > > > > > Hi Ard, > > > > > > pon., 19 lip 2021 o 11:54 Ard Biesheuvel napisa=C5= =82(a): > > > > > > > > On Mon, 19 Jul 2021 at 11:31, Marcin Wojtas wrote= : > > > > > > > > > > BBR 1.0 spec says that _STA is required for each device in DSDT o= r SSDT. > > > > > Fix that for all platforms with the Marvell SoC's. > > > > > > > > > > > > > Can we fix the BBR instead? If ACPI itself does not require _STA, B= BR > > > > should not require it either. > > > > > > > > > > > > > > I consulted with ARM on the matter. SBBR has requirements of things > > > that are otherwise optional in UEFI/ACPI/SMBIOS. Also some OS's may > > > require that and I can see those methods in most of the other ACPI > > > source files in the edk2-platfoms tree. I think the BBR requirements > > > discussions can follow, but it would be great if this change can be > > > applied, so that no to block other development. > > > > > > > Do you have any feedback to the patchset and the _STA methods concerns? > > > > Yes. I would like to understand why _STA methods are now mandated by BBR. > Understood. Providing an answer may not be immediate and may possibly require further discussion on the SystemArchAC level. How about we withdraw this single patch for now and process the remaining ones? We would come back to the _STA subject, as soon as there's more information available. Best regards, Marcin > > > > > > > > > > > > > Signed-off-by: Marcin Wojtas > > > > > --- > > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl |= 56 +++++++++++++++ > > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl |= 76 ++++++++++++++++++++ > > > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl |= 72 +++++++++++++++++++ > > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl |= 12 ++++ > > > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl |= 56 +++++++++++++++ > > > > > 5 files changed, 272 insertions(+) > > > > > > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/D= sdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > > index 345c1e4dd6..88e38efeeb 100644 > > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA7K", 3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU1) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU2) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > > > > > > Device (AHC0) > > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA7K", 3) > > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA7K", 3) > > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > { > > > > > Name (_HID, "MRVL0001") = // _HID: Hardware ID > > > > > Name (_CID, "HISI0031") = // _CID: Compatible ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) = // _ADR: Address > > > > > Name (_CRS, ResourceTemplate () = // _CRS: Current Resource Settings > > > > > { > > > > > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > { > > > > > Name (_HID, "MRVL0100") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA7K", 3) > > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribut= e > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > > { > > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/D= sdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > > index 91401c74c8..77d3aebaf1 100644 > > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU1) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU2) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > > > > > > Device (AHC0) > > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0001") = // _HID: Hardware ID > > > > > Name (_CID, "HISI0031") = // _CID: Compatible ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) = // _ADR: Address > > > > > Name (_CRS, ResourceTemplate () = // _CRS: Current Resource Settings > > > > > { > > > > > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0100") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0100") = // _HID: Hardware ID > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > > > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribut= e > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > > { > > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBi= n/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > > > index d26945d933..1ecbd0309c 100644 > > > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.= asl > > > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.= asl > > > > > @@ -19,21 +19,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU1) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU2) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > > > > > > Device (AHC0) > > > > > @@ -41,6 +57,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "ARMADA8K", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -91,6 +111,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -122,6 +146,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -150,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -169,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -188,6 +224,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -206,6 +246,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0001") = // _HID: Hardware ID > > > > > Name (_CID, "HISI0031") = // _CID: Compatible ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) = // _ADR: Address > > > > > Name (_CRS, ResourceTemplate () = // _CRS: Current Resource Settings > > > > > { > > > > > @@ -232,6 +276,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0100") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -249,6 +297,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "MRVL0101") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -283,6 +335,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > > @@ -322,6 +378,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > > @@ -400,6 +460,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > > @@ -420,6 +484,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > > > @@ -446,6 +514,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "ARMADA8K", 3) > > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribut= e > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > > { > > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ss= dt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > > index 8377b13763..d6619e367b 100644 > > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > > > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", = 2, "MVEBU ", "CN9131", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", = 2, "MVEBU ", "CN9131", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x02) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", = 2, "MVEBU ", "CN9131", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x01) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Ds= dt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > > index d76a2a902b..536df8ab4b 100644 > > > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "CN9130", 3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x000) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU1) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x001) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU2) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x100) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > Device (CPU3) > > > > > { > > > > > Name (_HID, "ACPI0007" /* Processor Device */) // _= HID: Hardware ID > > > > > Name (_UID, 0x101) // _UID: Unique ID > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > } > > > > > > > > > > Device (AHC0) > > > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > > > { > > > > > 0x01, > > > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU= ", "CN9130", 3) > > > > > Name (_HID, "MRVL0003") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -98,6 +122,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEB= U ", "CN9130", 3) > > > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -126,6 +154,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x00) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -145,6 +177,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > Name (_UID, 0x01) // _UID: Unique ID > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency= Attribute > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Re= source Settings > > > > > { > > > > > @@ -163,6 +199,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > { > > > > > Name (_HID, "MRVL0001") = // _HID: Hardware ID > > > > > Name (_CID, "HISI0031") = // _CID: Compatible ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) = // _ADR: Address > > > > > Name (_CRS, ResourceTemplate () = // _CRS: Current Resource Settings > > > > > { > > > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > { > > > > > Name (_HID, "MRVL0100") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, > > > > > @@ -211,6 +255,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > Name (_HID, "MRVL0110") = // _HID: Hardware ID > > > > > Name (_CCA, 0x01) = // Cache-coherent controller > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > > > @@ -289,6 +337,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > { > > > > > Name (_HID, "PRP0001") = // _HID: Hardware ID > > > > > Name (_UID, 0x00) = // _UID: Unique ID > > > > > + Method (_STA) = // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_CRS, ResourceTemplate () > > > > > { > > > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > > > @@ -315,6 +367,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVE= BU ", "CN9130", 3) > > > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribut= e > > > > > + Method (_STA) // _STA: Device status > > > > > + { > > > > > + Return (0xF) > > > > > + } > > > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > > > { > > > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > > > -- > > > > > 2.29.0 > > > > >