From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qk1-f171.google.com (mail-qk1-f171.google.com [209.85.222.171]) by mx.groups.io with SMTP id smtpd.web08.29883.1605728571928007945 for ; Wed, 18 Nov 2020 11:42:52 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=yGWJAZ+T; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.222.171, mailfrom: mw@semihalf.com) Received: by mail-qk1-f171.google.com with SMTP id d9so3011944qke.8 for ; Wed, 18 Nov 2020 11:42:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=qDOhgqlCp+Tz2eSTRgZKUYkEgbrt5OQ0f1rE33kth5A=; b=yGWJAZ+TgTGa+0dTUgATt33/QKQjsHoLAjzx6PlRPgrMawqeRWq6jJm+5BFYnrA+7s s8sRQvHyVhrmwY4/6lF6Riq0G8OHLw2W4P4A4XOJFQaehN+gJBHfW2hNjOYlY8f2q4nl xEdDhkRKRqjAFQp/Da3bqr6yt4HpkUasjEPQuitOSymn+vSP2fDaCMit8kgL7Nz9FpNR MAGYSuVCL17ffvovOOPGFwVITJ98KXeNkn61c7982fvhUh/MRHYMeK+grjK5TLrMNndL MSEwWCikbET09E93y84XTse4fabHrvm/t01l8vc3gzBv19A/dV0WjZth7gHEXaXolStx iQEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=qDOhgqlCp+Tz2eSTRgZKUYkEgbrt5OQ0f1rE33kth5A=; b=h9Ib7IMI4qDqC/UuhZNxEpKLqAVE0PQ0tm16TduT8KOACmUPbBVwRjGdXBno57lmQr zzM4GzNr/eDDZicklP7OanPxz6l8JEm8hOnOYMr3DruOmYx2+nBcYoiNcM0IJeRUggWf far5B8B1sI8BM6e3ljl4JDe6lUBxelW7hfJtCNg1nOZlcaQoA7r/vda5zAJq00RoUsRr +yQERMf3GPvwfs8HnS4qIh4ALDbwOui/JHl49YWs9xHuCOnG7YLFfUVlfh2tlC2WuQ5E 4zjWiU4Z7XAzknEabxlW6WpRtIGGIPA11CJm6vGEGwgTO2F4uyBiX1F4XMuMcn292mjg 3R0w== X-Gm-Message-State: AOAM5318Q8P/qMmyppSIcul6XElDXxz05tGwDTJz/VwJTRBxatwT2Oi5 NMhYM51fo7wWbLY8s111MraoG43FjL0IKL/CRiJpBvBl869MTA== X-Google-Smtp-Source: ABdhPJwoEFp1HDU3OQY2rq4+jqjScXzArwoxCCvDKRB7fN+eloxynBprnSvp1q9L8iLjX4f8jjaesJMBqEndPlwH2qI= X-Received: by 2002:a37:9ec4:: with SMTP id h187mr6791270qke.300.1605728570694; Wed, 18 Nov 2020 11:42:50 -0800 (PST) MIME-Version: 1.0 References: <20201114092104.19516-1-mw@semihalf.com> In-Reply-To: From: "Marcin Wojtas" Date: Wed, 18 Nov 2020 20:42:39 +0100 Message-ID: Subject: Re: [edk2-devel] [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description To: edk2-devel-groups-io , Ard Biesheuvel Cc: Leif Lindholm , "jsd@semihalf.com" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, sob., 14 lis 2020 o 14:19 Ard Biesheuvel napisa= =C5=82(a): > > Hello Marcin, > > On 11/14/20 10:21 AM, Marcin Wojtas wrote: > > This patch adds a new description of the board's SD/MMC > > interfaces in DSDT table that can work with the newly > > introduced support in Linux. > > Remaining Armada7k8k / CN913x platforms will follow > > after this binding is accepted. > > > > Signed-off-by: Marcin Wojtas > > --- > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 60 = ++++++++++++++++++++ > > 1 file changed, 60 insertions(+) > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsd= t.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > index 7e9e361988..5f910fa814 100644 > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > @@ -86,6 +86,66 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "= ARMADA8K", 3) > > }) > > } > > > > + Device (MMC0) > > + { > > + Name (_HID, "MRVL0002") // _HID: Hardware ID > > + Name (_UID, 0x00) // _UID: Unique ID > > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attr= ibute > > + > > + Name (_CRS, ResourceTemplate () // _CRS: Current Resourc= e Settings > > + { > > + Memory32Fixed (ReadWrite, > > + 0xF06E0000, // Address Base (MMIO) > > + 0x00000300, // Address Length > > + ) > > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclu= sive, ,, ) > > + { > > + 48 > > + } > > + }) > > + Name (_DSD, Package () { > > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), > > + Package () { > > + Package () { "clock-frequency", 400000000 }, > > + Package () { "bus-width", 8 }, > > + Package () { "marvell,xenon-phy-slow-mode", 0x1= }, > > + Package () { "no-1-8-v", 0x1 }, > > + Package () { "no-sd", 0x1 }, > > + Package () { "no-sdio", 0x1 }, > > + Package () { "non-removable", 0x1 }, > > + Package () { "compatible", "marvell,armada-ap80= 6-sdhci" }, > > Please use either a dedicated ACPI _HID, or use PRP0001+compatible to > match the device (and the former is strongly preferred). I'll go with the dedicated _HID and differentiate the silicon variant with acpi_match_data. Thanks, Marcin > > > > + } > > + }) > > + } > > + > > + Device (MMC1) > > + { > > + Name (_HID, "MRVL0002") // _HID: Hardware ID > > + Name (_UID, 0x01) // _UID: Unique ID > > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attr= ibute > > + > > + Name (_CRS, ResourceTemplate () // _CRS: Current Resourc= e Settings > > + { > > + Memory32Fixed (ReadWrite, > > + 0xF2780000, // Address Base (MMIO) > > + 0x00000300, // Address Length > > + ) > > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclu= sive, ,, ) > > + { > > + CP_GIC_SPI_CP0_SDMMC > > + } > > + }) > > + Name (_DSD, Package () { > > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), > > + Package () { > > + Package () { "clock-frequency", 400000000 }, > > + Package () { "bus-width", 4 }, > > + Package () { "broken-cd", 0x1 }, > > + Package () { "no-1-8-v", 0x1 }, > > + } > > + }) > > + } > > + > > Device (XHC0) > > { > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > > > >=20 > >