From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f47.google.com (mail-qv1-f47.google.com [209.85.219.47]) by mx.groups.io with SMTP id smtpd.web12.7388.1627551981176471297 for ; Thu, 29 Jul 2021 02:46:21 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=At+DINMq; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.219.47, mailfrom: mw@semihalf.com) Received: by mail-qv1-f47.google.com with SMTP id db14so3064613qvb.10 for ; Thu, 29 Jul 2021 02:46:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=fN5FLmlBOhlr40jbzi/2rs7IbE/zf0Dqt8i1gNr38gA=; b=At+DINMqacATNqgJ4Qz+S9xLKnerwFQjZO4vcODScY6K2f9kjVRIbCcKGTJB3DlzOb ZKst80FaDyOmoZw3i7T/qTP0/pZszLN5U+LFxB4s/mQbvc0mizKIO4mP8CwZTJlHDEYI 3La64bCEaCaD5iJ4udPhEkFxbJLsruAuhiR//NgT0jKi9kP55vsuqcLXkcTihoj44zYK 771PsukFA2nrZLCAQpg98o9C5oTWF1qnIB1ktyE/yqDY5aLWm+5k8PkO3pPmCffMAVlp vFTfdcjH/A1WP703pOR6SxKJDHsMoCsjLDUvo6cF4NERVApw94EifUvY6ZvPo40oNR1U cn0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=fN5FLmlBOhlr40jbzi/2rs7IbE/zf0Dqt8i1gNr38gA=; b=i00GDHy/KXGDwekvIGJL+uP5k3oBWBP8h1Mq8Q0St+aWeEoGvqEdmUdC4GMFXHiF9I V2oRSgKLF10w6/gSkG556Yo2Pu70fl3I7uMY0LAAwAODMUUMRkByU1FAzskTVy/2thWy JWHQRKfuHbN/RUDPv3Vd1NThHbK3RSljGnIBE5ikOqnBaGt7U22svOzdXa8dRGmo6RqZ UvUJoncp99Px48Ng7+S7uzzbb0REkByUEZgpHZ0zEP/caHJth9HBt+M3msZ6B6a18LsS c7AMub0bmwR7yDgp1C5CxNmrW78L+UGtkYqonSsH0dhlKl7Sfm05d/w6YKVmLdJGFG/S AD/Q== X-Gm-Message-State: AOAM53071ngDkcmEvw3hIssMVQRtxc1y6mRtu2d2NIepiBEW/1uS+U3s ib4BCsClLN1Z0OcSoUQGz0lw9uQetEkGm13O7WX0SQ== X-Google-Smtp-Source: ABdhPJxYOx0fgdiZpho19BUvKJYpu75xGI3qAhsKNyqQLlTTOyF9RwNG/jKG4oDgrsyiCCGCxrTP93d2atedH/og7qM= X-Received: by 2002:a0c:be8e:: with SMTP id n14mr1794157qvi.16.1627551979817; Thu, 29 Jul 2021 02:46:19 -0700 (PDT) MIME-Version: 1.0 References: <20210719093015.1490932-1-mw@semihalf.com> <20210719093015.1490932-3-mw@semihalf.com> In-Reply-To: From: "Marcin Wojtas" Date: Thu, 29 Jul 2021 11:46:08 +0200 Message-ID: Subject: Re: [edk2-platforms PATCH 2/7] Marvell: Armada7k8k/OcteonTx: Add missing _STA methods in ACPI tables To: Ard Biesheuvel Cc: Samer El-Haj-Mahmoud , edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , upstream@semihalf.com, Jon Nettleton Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ard, pon., 19 lip 2021 o 17:06 Marcin Wojtas napisa=C5=82(a): > > Hi Ard, > > pon., 19 lip 2021 o 11:54 Ard Biesheuvel napisa=C5=82(a= ): > > > > On Mon, 19 Jul 2021 at 11:31, Marcin Wojtas wrote: > > > > > > BBR 1.0 spec says that _STA is required for each device in DSDT or SS= DT. > > > Fix that for all platforms with the Marvell SoC's. > > > > > > > Can we fix the BBR instead? If ACPI itself does not require _STA, BBR > > should not require it either. > > > > > > I consulted with ARM on the matter. SBBR has requirements of things > that are otherwise optional in UEFI/ACPI/SMBIOS. Also some OS's may > require that and I can see those methods in most of the other ACPI > source files in the edk2-platfoms tree. I think the BBR requirements > discussions can follow, but it would be great if this change can be > applied, so that no to block other development. > Do you have any feedback to the patchset and the _STA methods concerns? Best regards, Marcin > > > > > > Signed-off-by: Marcin Wojtas > > > --- > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 56 = +++++++++++++++ > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 76 = ++++++++++++++++++++ > > > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 72 = +++++++++++++++++++ > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 12 = ++++ > > > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 56 = +++++++++++++++ > > > 5 files changed, 272 insertions(+) > > > > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.= asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > index 345c1e4dd6..88e38efeeb 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA7K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA7K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA7K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -96,6 +120,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA7K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -123,6 +151,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -142,6 +174,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -160,6 +196,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -186,6 +226,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -208,6 +252,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -286,6 +334,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -312,6 +364,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA7K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.= asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > index 91401c74c8..77d3aebaf1 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -92,6 +116,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -122,6 +150,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -151,6 +183,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -170,6 +206,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -207,6 +251,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -233,6 +281,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -251,6 +303,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -309,6 +365,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -327,6 +387,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > @@ -385,6 +449,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -405,6 +473,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x01) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > @@ -431,6 +503,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Ds= dt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > index d26945d933..1ecbd0309c 100644 > > > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl > > > @@ -19,21 +19,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -41,6 +57,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "ARMADA8K", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -91,6 +111,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "ARMADA8K", 3) > > > Name (_HID, "MRVL0002") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -122,6 +146,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -150,6 +178,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -169,6 +201,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -188,6 +224,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -206,6 +246,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -232,6 +276,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -249,6 +297,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "MRVL0101") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -283,6 +335,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -322,6 +378,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > @@ -400,6 +460,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -420,6 +484,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x01) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF4760000, 0x7D) > > > @@ -446,6 +514,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "ARMADA8K", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.a= sl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > index 8377b13763..d6619e367b 100644 > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl > > > @@ -20,6 +20,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -45,6 +49,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x02) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -63,6 +71,10 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "= MVEBU ", "CN9131", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x01) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000) > > > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.a= sl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > index d76a2a902b..536df8ab4b 100644 > > > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl > > > @@ -20,21 +20,37 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "CN9130", 3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x000) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU1) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x001) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU2) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x100) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > Device (CPU3) > > > { > > > Name (_HID, "ACPI0007" /* Processor Device */) // _HID:= Hardware ID > > > Name (_UID, 0x101) // _UID: Unique ID > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > } > > > > > > Device (AHC0) > > > @@ -42,6 +58,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "CN9130", 3) > > > Name (_HID, "LNRO001E") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CLS, Package (0x03) // _CLS: Class Code > > > { > > > 0x01, > > > @@ -67,6 +87,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", = "CN9130", 3) > > > Name (_HID, "MRVL0003") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -98,6 +122,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ",= "CN9130", 3) > > > Name (_HID, "MRVL0004") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -126,6 +154,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -145,6 +177,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "PNP0D10") // _HID: Hardware ID > > > Name (_UID, 0x01) // _UID: Unique ID > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Att= ribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > > > > Name (_CRS, ResourceTemplate () // _CRS: Current Resour= ce Settings > > > { > > > @@ -163,6 +199,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > { > > > Name (_HID, "MRVL0001") // _= HID: Hardware ID > > > Name (_CID, "HISI0031") // _= CID: Compatible ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _= ADR: Address > > > Name (_CRS, ResourceTemplate () // _= CRS: Current Resource Settings > > > { > > > @@ -189,6 +229,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > { > > > Name (_HID, "MRVL0100") // _= HID: Hardware ID > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, > > > @@ -211,6 +255,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_HID, "MRVL0110") // _= HID: Hardware ID > > > Name (_CCA, 0x01) // C= ache-coherent controller > > > Name (_UID, 0x00) // _= UID: Unique ID > > > + Method (_STA) // _= STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000) > > > @@ -289,6 +337,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > { > > > Name (_HID, "PRP0001") /= / _HID: Hardware ID > > > Name (_UID, 0x00) /= / _UID: Unique ID > > > + Method (_STA) /= / _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_CRS, ResourceTemplate () > > > { > > > Memory32Fixed (ReadWrite, 0xF2760000, 0x7D) > > > @@ -315,6 +367,10 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU "= , "CN9130", 3) > > > Name (_SEG, 0x00) // _SEG: PCI Segment > > > Name (_BBN, 0x00) // _BBN: BIOS Bus Number > > > Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute > > > + Method (_STA) // _STA: Device status > > > + { > > > + Return (0xF) > > > + } > > > Name (_PRT, Package () // _PRT: PCI Routing Table > > > { > > > Package () { 0xFFFF, 0x0, 0x0, 0x40 }, > > > -- > > > 2.29.0 > > >