From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=O5rxeyJx; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.160.193, mailfrom: mw@semihalf.com) Received: from mail-qt1-f193.google.com (mail-qt1-f193.google.com [209.85.160.193]) by groups.io with SMTP; Fri, 16 Aug 2019 14:03:52 -0700 Received: by mail-qt1-f193.google.com with SMTP id 44so7554491qtg.11 for ; Fri, 16 Aug 2019 14:03:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=GnQ+1GyLVX4KDtrMwt+tR29iphkK3iDjWnQqwLDDC64=; b=O5rxeyJxh7jd4Ve3mKtGmpw6GHEX3Ib1KUaOHUezAoYa1mhJmwv6mrMOPjUk+zXCW8 3SwxKSpBL62XwClB6W8V+JQR3p2ZAMf3VotDtkocrfy+R4tJ03zVSqdcX4QtAPN1SAiA SkTvbmDeTpLCaABfzs8ArklISY6wpO7ribdB1+JwKOdEaH5U27RU20cxlfY7zyGz+IXK MRH3Xiln0scT4x7UWImg0PHnWq7xZ5z8RrOb1i5SgwOE8AaaRt8oTQC9dF8YKE8qB9PP jUlOiV2/WYEOTzob1Z69Gcsf/r1QXGcvp4WttcCPcYG/eZMlhZrtwPjyKJNzSwGzUSC3 hc/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=GnQ+1GyLVX4KDtrMwt+tR29iphkK3iDjWnQqwLDDC64=; b=ivUPgGHTp3cq+qk10oYB89/hvT/yUzw2liZFU2AJlvihTUx42E5dlhGYQ707h6KO33 wfuvhGNf7DS8TKTVs1xgk1+Rnha0pGg78nDt0LrqR6su/uWBZ44BhsWOhcry1C35CWn+ bigAakEG+Btte2frfMKB3hiqU1/R/2DqJog0/2oE8Pq58C3hwMOPLtEDY+jcHiwcMtQv Wy43X24Lgay7Xfhz3rS7zTslxR2cwW5YABmjoDCROakFecSAMV/sQk2mJJEXZ+fj/GGe zwt8crw5InQRNpV4gqv14lZQttX/U255Wv0wq6kawOWdX44dMXwGN15W5GwQk/cdTBqq PMDw== X-Gm-Message-State: APjAAAUgatP31jjZmyiBU5kqicjejk71CqwpXoT2CH2VLGMI1QIPvnti 4TFNw52rsbs/I/QjX2zfppcWvS8px7YkoAmgxzOEfg== X-Google-Smtp-Source: APXvYqyaX/2QFrPlOBbm3CcWUhkuxVCnQNEk9qYTERwIfriKh9g6Gfp/5FsjcCqASxz3/nJHzz+9E2E2AXq9dasrS+8= X-Received: by 2002:ac8:2955:: with SMTP id z21mr10548214qtz.204.1565989431509; Fri, 16 Aug 2019 14:03:51 -0700 (PDT) MIME-Version: 1.0 References: <1565837654-13258-1-git-send-email-mw@semihalf.com> <1565837654-13258-4-git-send-email-mw@semihalf.com> <20190816171021.GV29255@bivouac.eciton.net> In-Reply-To: <20190816171021.GV29255@bivouac.eciton.net> From: "Marcin Wojtas" Date: Fri, 16 Aug 2019 23:03:42 +0200 Message-ID: Subject: Re: [edk2-platforms: PATCH v2 03/10] Marvell/Cn9130Db: Add DeviceTree To: Leif Lindholm Cc: edk2-devel-groups-io , Ard Biesheuvel , "jsd@semihalf.com" , Grzegorz Jaszczyk , Kostya Porotchkin Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Leif, pt., 16 sie 2019 o 19:10 Leif Lindholm napisa=C5= =82(a): > > On Thu, Aug 15, 2019 at 04:54:07AM +0200, Marcin Wojtas wrote: > > This patch adds device tree sources which are common for Cn913x SoCs > > and the CN9130 development board (variant A). Wiring up of support > > will be done in the follow-up commits. > > > > Signed-off-by: Marcin Wojtas > > Again, I've not reviewed the contents extensively, *but* this patch > cannot go into edk2-platforms - it has GPL licensed content. > Was it meant for edk2-non-osi? Because we could take it there. > Thanks for catching this - my oversight. The top-level DT files should also be dual licenced (GPL2.0/MIT), same as recently submitted to Linux. So IMO no need to go for edk2-non-osi. Best regards, Marcin > Best Regards, > > Leif > > > --- > > Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi | 43 += + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806.dtsi | 264 += +++++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-common.dtsi | 10 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp110.dtsi | 552 += +++++++++++++++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A.dts | 185 += ++++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.dtsi | 168 += +++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi | 126 += ++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A.dts | 29 + > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.dtsi | 173 += +++++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A.dts | 76 += ++ > > Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.dtsi | 151 += +++++ > > 12 files changed, 1799 insertions(+) > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.i= nf > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap80= 6-quad.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap80= 6.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-comm= on.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-cp11= 0.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db-A= .dts > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130-db.d= tsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9130.dtsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db-A= .dts > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9131-db.d= tsi > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db-A= .dts > > create mode 100644 Silicon/Marvell/OcteonTx/DeviceTree/T91/cn9132-db.d= tsi