From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 3C894941CFF for ; Tue, 14 Nov 2023 20:24:23 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=CVLAjMRQvlmCVeZSewgzPrjl/MSugp0AbWsMLUMb6rI=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1699993461; v=1; b=gnSP3RKXvt69sqY2V5n207lVPJbejyZ53geUkX6ewXkChd5TAFg5GbSugg8b3TvijPOBqjQ4 Oavd1whZ2n2TChm03Mf0ZxLu1jsEcHia26yoZMZSixX7vfPxsNvwPZMwWOVUpaW+h99aGDwAA3C a3uYR1yX2xvBfGlycD+P2IPk= X-Received: by 127.0.0.2 with SMTP id PfhYYY7687511xyGPsD42yBS; Tue, 14 Nov 2023 12:24:21 -0800 X-Received: from mail-oo1-f51.google.com (mail-oo1-f51.google.com [209.85.161.51]) by mx.groups.io with SMTP id smtpd.web11.3639.1699993460567897732 for ; Tue, 14 Nov 2023 12:24:21 -0800 X-Received: by mail-oo1-f51.google.com with SMTP id 006d021491bc7-581fb6f53fcso3624837eaf.2 for ; Tue, 14 Nov 2023 12:24:20 -0800 (PST) X-Gm-Message-State: 0C8tNLyPyZpDFUBfeS9n00GNx7686176AA= X-Google-Smtp-Source: AGHT+IFsypSnLAgm0PWf559QJ2MX4gW8vZEbiVSY8R8+embBBYV+HW44IXlw5ivWBmGTx7sRnAfOWWSfv9bDsysa18s= X-Received: by 2002:a4a:9248:0:b0:57d:e76d:c206 with SMTP id g8-20020a4a9248000000b0057de76dc206mr11080703ooh.1.1699993459545; Tue, 14 Nov 2023 12:24:19 -0800 (PST) MIME-Version: 1.0 References: <20231102034552.4515-1-ndhillon@marvell.com> <20231102034552.4515-2-ndhillon@marvell.com> In-Reply-To: <20231102034552.4515-2-ndhillon@marvell.com> From: "Marcin Wojtas via groups.io" Date: Tue, 14 Nov 2023 21:24:08 +0100 Message-ID: Subject: Re: [edk2-devel] [edk2-platforms PATCH v2 1/1] Silicon/Marvell: Retructure package To: devel@edk2.groups.io, ndhillon@marvell.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mw@semihalf.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=gnSP3RKX; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Hi Narinder, Thanks for the patch. 2 comments: s/Retructure/Restructure/ from the commit title. czw., 2 lis 2023 o 04:47 Narinder Dhillon napisa=C5= =82(a): > > From: Narinder Dhillon > > Current Marvell package structure makes it difficult to add new silicon > packages that reuse common elements without creating nested DEC files. > > This patch creates a new MarvellSiliconPkg folder and moves the current > common elements inside it. > > Also gMarvellTokenSpaceGuid has been renamed to > gMarvellSiliconTokenSpaceGuid to align with new package name. > > Signed-off-by: Narinder Dhillon > --- > .../Marvell/Armada70x0Db/Armada70x0Db.dsc | 108 ++++----- > .../Armada70x0DbBoardDescLib.inf | 2 +- > .../NonDiscoverableInitLib.inf | 2 +- > .../Marvell/Armada80x0Db/Armada80x0Db.dsc | 133 ++++++----- > .../Armada80x0DbBoardDescLib.inf | 2 +- > .../NonDiscoverableInitLib.inf | 2 +- > .../Cn9130DbABoardDescLib.inf | 2 +- > .../Cn9132DbABoardDescLib.inf | 2 +- > Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc | 100 ++++----- > Platform/Marvell/Cn913xDb/Cn9131DbA.dsc.inc | 66 +++--- > Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc | 66 +++--- > Platform/Marvell/Cn913xDb/Cn913xDbA.dsc | 8 +- > .../NonDiscoverableInitLib.inf | 2 +- > .../Armada80x0McBin/Armada80x0McBin.dsc | 116 +++++----- > .../Armada80x0McBinBoardDescLib.inf | 2 +- > .../NonDiscoverableInitLib.inf | 2 +- > .../BoardDescriptionLib.inf | 2 +- > .../Cn913xCEx7Eval/Cn9130Eval.dsc.inc | 40 ++-- > .../Cn913xCEx7Eval/Cn9131Eval.dsc.inc | 56 ++--- > .../Cn913xCEx7Eval/Cn9132Eval.dsc.inc | 56 ++--- > .../Cn913xCEx7Eval/Cn913xCEx7.dsc.inc | 60 ++--- > .../Cn913xCEx7Eval/Cn913xCEx7Eval.dsc | 6 +- > .../NonDiscoverableInitLib.inf | 2 +- > .../Applications/EepromCmd/EepromCmd.inf | 2 +- > .../Applications/FirmwareUpdate/FUpdate.inf | 6 +- > .../Applications/SpiTool/SpiFlashCmd.inf | 6 +- > .../Armada7k8k/AcpiTables/Armada70x0Db.inf | 2 +- > .../Armada7k8k/AcpiTables/Armada80x0Db.inf | 2 +- > .../Armada7k8k/AcpiTables/Armada80x0McBin.inf | 2 +- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 22 +- > .../Armada7k8kRngDxe/Armada7k8kRngDxe.inf | 4 +- > .../Drivers/PlatInitDxe/PlatInitDxe.inf | 6 +- > .../PlatformFlashAccessLib.inf | 6 +- > .../Library/Armada7k8kLib/Armada7k8kLib.inf | 4 +- > .../Armada7k8kMemoryInitPeiLib.inf | 14 +- > .../PciHostBridgeLib.inf | 2 +- > .../Armada7k8kPciSegmentLib/PciSegmentLib.inf | 2 +- > .../Armada7k8kSampleAtResetLib.inf | 2 +- > .../Armada7k8kSoCDescLib.inf | 4 +- > .../RealTimeClockLib/RealTimeClockLib.inf | 4 +- > .../Marvell/Documentation/PortingGuide.txt | 114 +++++----- > .../Drivers/BoardDesc/MvBoardDescDxe.inf | 18 +- > .../Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf | 2 +- > .../Gpio/MvPca95xxDxe/MvPca95xxDxe.inf | 2 +- > .../Drivers/I2c/MvEepromDxe/MvEepromDxe.inf | 6 +- > .../Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 14 +- > .../Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 2 +- > .../Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.inf | 12 +- > Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 16 +- > .../NonDiscoverableDxe/NonDiscoverableDxe.inf | 2 +- > .../Drivers/SdMmc/XenonDxe/XenonDxe.inf | 2 +- > .../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 14 +- > .../Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf | 8 +- > .../Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf | 2 +- > .../Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf | 8 +- > .../Marvell/Library/ComPhyLib/ComPhyLib.inf | 28 +-- > Silicon/Marvell/Library/IcuLib/IcuLib.inf | 4 +- > Silicon/Marvell/Library/MppLib/MppLib.inf | 94 ++++---- > .../Marvell/Library/MvGpioLib/MvGpioLib.inf | 2 +- > .../Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 2 +- > Silicon/Marvell/Marvell.dec | 208 ------------------ > .../Include/IndustryStandard/MvSmc.h | 0 > .../Include/Library/ArmadaBoardDescLib.h | 0 > .../Include/Library/ArmadaIcuLib.h | 0 > .../Include/Library/ArmadaSoCDescLib.h | 0 > .../Include/Library/MppLib.h | 0 > .../Include/Library/MvComPhyLib.h | 0 > .../Include/Library/MvGpioLib.h | 0 > .../Include/Library/NonDiscoverableInitLib.h | 0 > .../Include/Library/SampleAtResetLib.h | 0 > .../Include/Library/UtmiPhyLib.h | 0 > .../Include/Protocol/BoardDesc.h | 0 > .../Include/Protocol/Eeprom.h | 0 > .../Include/Protocol/Mdio.h | 0 > .../Include/Protocol/MvI2c.h | 0 > .../Include/Protocol/MvPhy.h | 0 > .../Include/Protocol/Spi.h | 0 > .../Include/Protocol/SpiFlash.h | 0 > .../MarvellSiliconPkg/MarvellSiliconPkg.dec | 207 +++++++++++++++++ > .../OcteonTx/AcpiTables/T91/Cn9130DbA.inf | 2 +- > .../OcteonTx/AcpiTables/T91/Cn9131DbA.inf | 2 +- > .../AcpiTables/T91/Cn913xCEx7Eval.inf | 2 +- > 82 files changed, 848 insertions(+), 852 deletions(-) > delete mode 100644 Silicon/Marvell/Marvell.dec > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/IndustryStandar= d/MvSmc.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/ArmadaB= oardDescLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/ArmadaI= cuLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/ArmadaS= oCDescLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/MppLib.= h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/MvComPh= yLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/MvGpioL= ib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/NonDisc= overableInitLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/SampleA= tResetLib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Library/UtmiPhy= Lib.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/BoardD= esc.h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/Eeprom= .h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/Mdio.h= (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/MvI2c.= h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/MvPhy.= h (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/Spi.h = (100%) > rename Silicon/Marvell/{ =3D> MarvellSiliconPkg}/Include/Protocol/SpiFla= sh.h (100%) > create mode 100644 Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.d= ec > > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Ma= rvell/Armada70x0Db/Armada70x0Db.dsc > index 5df7498f71..362175f59e 100644 > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc > @@ -48,54 +48,54 @@ > ########################################################################= ######## > [PcdsFixedAtBuild.common] > #Platform description > - gMarvellTokenSpaceGuid.PcdProductPlatformName|"Armada 7040 DB" > - gMarvellTokenSpaceGuid.PcdProductVersion|"Rev. 1.5" > + gMarvellSiliconTokenSpaceGuid.PcdProductPlatformName|"Armada 7040 DB" > + gMarvellSiliconTokenSpaceGuid.PcdProductVersion|"Rev. 1.5" > > #CP110 count > - gMarvellTokenSpaceGuid.PcdMaxCpCount|1 > + gMarvellSiliconTokenSpaceGuid.PcdMaxCpCount|1 > > #MPP > - gMarvellTokenSpaceGuid.PcdMppChipCount|2 > + gMarvellSiliconTokenSpaceGuid.PcdMppChipCount|2 > > # APN806-A0 MPP SET > - gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE > - gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000 > - gMarvellTokenSpaceGuid.PcdChip0MppPinCount|20 > - gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1,= 0x1, 0x1, 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x1, 0x3, 0x0, 0x0, 0x0, 0x0,= 0x0, 0x0, 0x0, 0x3 } > + gMarvellSiliconTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE > + gMarvellSiliconTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000 > + gMarvellSiliconTokenSpaceGuid.PcdChip0MppPinCount|20 > + gMarvellSiliconTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x= 1, 0x1, 0x1, 0x1, 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdChip0MppSel1|{ 0x1, 0x3, 0x0, 0x0, 0x= 0, 0x0, 0x0, 0x0, 0x0, 0x3 } > > # CP110 MPP SET - Router configuration > - gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag|FALSE > - gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress|0xF2440000 > - gMarvellTokenSpaceGuid.PcdChip1MppPinCount|64 > - gMarvellTokenSpaceGuid.PcdChip1MppSel0|{ 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,= 0x4, 0x4, 0x4, 0x4 } > - gMarvellTokenSpaceGuid.PcdChip1MppSel1|{ 0x4, 0x4, 0x0, 0x3, 0x3, 0x3,= 0x3, 0x0, 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdChip1MppSel2|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,= 0x0, 0x0, 0x9, 0xA } > - gMarvellTokenSpaceGuid.PcdChip1MppSel3|{ 0xA, 0x0, 0x7, 0x0, 0x7, 0x7,= 0x7, 0x2, 0x2, 0x0 } > - gMarvellTokenSpaceGuid.PcdChip1MppSel4|{ 0x0, 0x0, 0x0, 0x0, 0x1, 0x1,= 0x1, 0x1, 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdChip1MppSel5|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1,= 0xE, 0xE, 0xE, 0xE } > - gMarvellTokenSpaceGuid.PcdChip1MppSel6|{ 0xE, 0xE, 0xE, 0x0, 0x0, 0x0,= 0x0, 0x0, 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppReverseFlag|FALSE > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppBaseAddress|0xF2440000 > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppPinCount|64 > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel0|{ 0x4, 0x4, 0x4, 0x4, 0x= 4, 0x4, 0x4, 0x4, 0x4, 0x4 } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel1|{ 0x4, 0x4, 0x0, 0x3, 0x= 3, 0x3, 0x3, 0x0, 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel2|{ 0x0, 0x0, 0x0, 0x0, 0x= 0, 0x0, 0x0, 0x0, 0x9, 0xA } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel3|{ 0xA, 0x0, 0x7, 0x0, 0x= 7, 0x7, 0x7, 0x2, 0x2, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel4|{ 0x0, 0x0, 0x0, 0x0, 0x= 1, 0x1, 0x1, 0x1, 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel5|{ 0x1, 0x1, 0x1, 0x1, 0x= 1, 0x1, 0xE, 0xE, 0xE, 0xE } > + gMarvellSiliconTokenSpaceGuid.PcdChip1MppSel6|{ 0xE, 0xE, 0xE, 0x0, 0x= 0, 0x0, 0x0, 0x0, 0x0, 0x0 } > > # I2C > - gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60, 0x21 } > - gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 } > - gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000 > - gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000 > - gMarvellTokenSpaceGuid.PcdI2cBusCount|2 > + gMarvellSiliconTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60,= 0x21 } > + gMarvellSiliconTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x1= } > + gMarvellSiliconTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 } > + gMarvellSiliconTokenSpaceGuid.PcdEepromI2cBuses|{ 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdI2cClockFrequency|250000000 > + gMarvellSiliconTokenSpaceGuid.PcdI2cBaudRate|100000 > + gMarvellSiliconTokenSpaceGuid.PcdI2cBusCount|2 > > #SPI > - gMarvellTokenSpaceGuid.PcdSpiRegBase|0xF2700680 > - gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|10000000 > - gMarvellTokenSpaceGuid.PcdSpiClockFrequency|200000000 > + gMarvellSiliconTokenSpaceGuid.PcdSpiRegBase|0xF2700680 > + gMarvellSiliconTokenSpaceGuid.PcdSpiMaxFrequency|10000000 > + gMarvellSiliconTokenSpaceGuid.PcdSpiClockFrequency|200000000 > > - gMarvellTokenSpaceGuid.PcdSpiFlashMode|3 > - gMarvellTokenSpaceGuid.PcdSpiFlashCs|0 > + gMarvellSiliconTokenSpaceGuid.PcdSpiFlashMode|3 > + gMarvellSiliconTokenSpaceGuid.PcdSpiFlashCs|0 > > #ComPhy > - gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdComPhyDevices|{ 0x1 } > # ComPhy0 > # 0: SGMII1 1.25 Gbps > # 1: USB3_HOST0 5 Gbps > @@ -103,36 +103,36 @@ > # 3: SATA1 5 Gbps > # 4: USB3_HOST1 5 Gbps > # 5: PCIE2 5 Gbps > - gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|{ $(CP_SGMII1), $(CP_USB3_H= OST0), $(CP_SFI), $(CP_SATA1), $(CP_USB3_HOST1), $(CP_PCIE2) } > - gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|{ $(CP_1_25G), $(CP_5G), $= (CP_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) } > + gMarvellSiliconTokenSpaceGuid.PcdChip0ComPhyTypes|{ $(CP_SGMII1), $(CP= _USB3_HOST0), $(CP_SFI), $(CP_SATA1), $(CP_USB3_HOST1), $(CP_PCIE2) } > + gMarvellSiliconTokenSpaceGuid.PcdChip0ComPhySpeeds|{ $(CP_1_25G), $(CP= _5G), $(CP_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) } > > #UtmiPhy > - gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdUtmiPortType|{ $(UTMI_USB_HOST0), $(UTMI_USB= _HOST1) } > + gMarvellSiliconTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdUtmiPortType|{ $(UTMI_USB_HOST0), $(U= TMI_USB_HOST1) } > > #MDIO > - gMarvellTokenSpaceGuid.PcdMdioControllersEnabled|{ 0x1, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdMdioControllersEnabled|{ 0x1, 0x0 } > > #PHY > - gMarvellTokenSpaceGuid.PcdPhy2MdioController|{ 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdPhySmiAddresses|{ 0x0, 0x1 } > - gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE > + gMarvellSiliconTokenSpaceGuid.PcdPhy2MdioController|{ 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdPhySmiAddresses|{ 0x0, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE > > #NET > - gMarvellTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 } > - gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x0, 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ $(PHY_SPEED_10000), $(PH= Y_SPEED_1000), $(PHY_SPEED_1000) } > - gMarvellTokenSpaceGuid.PcdPp2PhyConnectionTypes|{ $(PHY_SFI), $(PHY_SG= MII), $(PHY_RGMII) } > - gMarvellTokenSpaceGuid.PcdPp2PhyIndexes|{ 0xFF, 0x0, 0x1 } > - gMarvellTokenSpaceGuid.PcdPp2Port2Controller|{ 0x0, 0x0, 0x0 } > - gMarvellTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 } > - gMarvellTokenSpaceGuid.PcdPp2Controllers|{ 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 } > + gMarvellSiliconTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x0, 0x0, 0x0 = } > + gMarvellSiliconTokenSpaceGuid.PcdPp2InterfaceSpeed|{ $(PHY_SPEED_10000= ), $(PHY_SPEED_1000), $(PHY_SPEED_1000) } > + gMarvellSiliconTokenSpaceGuid.PcdPp2PhyConnectionTypes|{ $(PHY_SFI), $= (PHY_SGMII), $(PHY_RGMII) } > + gMarvellSiliconTokenSpaceGuid.PcdPp2PhyIndexes|{ 0xFF, 0x0, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPp2Port2Controller|{ 0x0, 0x0, 0x0 } > + gMarvellSiliconTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 } > + gMarvellSiliconTokenSpaceGuid.PcdPp2Controllers|{ 0x1 } > > #PciEmulation > - gMarvellTokenSpaceGuid.PcdPciEXhci|{ 0x1, 0x1 } > - gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x1 } > - gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPciEXhci|{ 0x1, 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPciEAhci|{ 0x1 } > + gMarvellSiliconTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 } > > #RTC > - gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000 > + gMarvellSiliconTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000 > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armad= a70x0DbBoardDescLib.inf b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDe= scLib/Armada70x0DbBoardDescLib.inf > index 20294ab43b..75331ae8e4 100644 > --- a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0Db= BoardDescLib.inf > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0Db= BoardDescLib.inf > @@ -22,7 +22,7 @@ > EmbeddedPkg/EmbeddedPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > - Silicon/Marvell/Marvell.dec > + Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec > > [LibraryClasses] > DebugLib > diff --git a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDisc= overableInitLib.inf b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/= NonDiscoverableInitLib.inf > index 946b9fd6d0..64623e33f8 100644 > --- a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverabl= eInitLib.inf > +++ b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverabl= eInitLib.inf > @@ -29,7 +29,7 @@ > EmbeddedPkg/EmbeddedPkg.dec > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec > - Silicon/Marvell/Marvell.dec > + Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec > > [LibraryClasses] > DebugLib > diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Ma= rvell/Armada80x0Db/Armada80x0Db.dsc > index 2698bd6573..22a0040265 100644 > --- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc > +++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc > @@ -31,9 +31,6 @@ > > !include MdePkg/MdeLibs.dsc.inc > > -[Components.common] > - Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf Please bring this one back. Thanks, Marcin > - > [Components.AARCH64] > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf > -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111219): https://edk2.groups.io/g/devel/message/111219 Mute This Topic: https://groups.io/mt/102335610/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-