From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2607:f8b0:4864:20::143; helo=mail-it1-x143.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-it1-x143.google.com (mail-it1-x143.google.com [IPv6:2607:f8b0:4864:20::143]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4F8A321A07A92 for ; Tue, 13 Nov 2018 00:25:36 -0800 (PST) Received: by mail-it1-x143.google.com with SMTP id t190-v6so16847847itb.2 for ; Tue, 13 Nov 2018 00:25:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=stRaiKBSjnRxoFqlVjlKIPfpDJJYP8czuogSYspk4pg=; b=2TWqv9KmbLc3sdvrEy4U50GHueiljKUQBB4idrbYswjfkZgxRxf1+Qgrnh5ODu8iAJ TwGuAhF1wp2tZmTDBcfhhwwGkyaVIUvmmuJoBPMzz9n0pvON1kF8Bw7NQ+nxZT3m9vpn G646iZp4Pf+hZpUISbgq4/6uTFHEY5XuXUa6093YcFtdw8e2WKh19AbBtKHZwCb3oFPW F3+bT2JEzPUfRbA7IenM5IFTEycY+EqGwoK0kttdsCFkNL2Suo4l4dzQLmv1WDKaw6qA hPQJtyk4NL8pmpaYioDHuw2eOQT+iqxHu+sygL27+PGecWnLnjjqIB0SiJCJoguBl2UR ImQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=stRaiKBSjnRxoFqlVjlKIPfpDJJYP8czuogSYspk4pg=; b=loZmE59iuSQwhIr/GyD2yye79vSSBFTng8RTpFT9sdmbbdfCmWw5DEldHuRh4p/Ycd nyYdyf3eOGEcFgWMhQ2aSStUIEDfMmKMC0AWQBxS/GLWEaD7ahudAPBkgewLF6lj0L6d gB3qo5m2fxupBn5mUK6UWVpdk5sGhOaGY4ZvB3QXzp30jVLR+Na+Q5Iag63GHK/jVwcm ExvnFHBrk4V01Y2+PKaky+i6jGmWmdskuqqmeazVRlyHqGfKEJDkrqadPtoax2iUaShL HPQquioS1V6K18ac6XObzi6mSKZPlF7kgdDBderfAj+SMqZOCQfuzYc9rHW4BCkYqxtW K/PA== X-Gm-Message-State: AGRZ1gJtvwwLNq0b4ybURrxwVZrXmpZRvH834WlknGdteWuEx8j+tzlv /H0Ms+fuevmI6hoWYDSF/3tD9T5gSO58vIcbZzuGPQ== X-Google-Smtp-Source: AJdET5fhzKQpaiU+2B42C/h3eUwX/5UKk2no+IWKjjTiBVANhQwvwfOWCKZZHOfJHOcuh9+00U/dDAv3N1goE6hNbRQ= X-Received: by 2002:a24:a10:: with SMTP id 16-v6mr2196665itw.145.1542097535474; Tue, 13 Nov 2018 00:25:35 -0800 (PST) MIME-Version: 1.0 References: <1541804487-27458-1-git-send-email-mw@semihalf.com> In-Reply-To: From: Marcin Wojtas Date: Tue, 13 Nov 2018 09:25:20 +0100 Message-ID: To: hao.a.wu@intel.com Cc: edk2-devel-01 , Leif Lindholm , "Kinney, Michael D" , "Gao, Liming" , Ard Biesheuvel , nadavh@marvell.com, "jsd@semihalf.com" , Tomasz Michalec , Grzegorz Jaszczyk Subject: Re: [PATCH v4 0/4] SdMmcOverride extension X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Nov 2018 08:25:36 -0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Hao, wt., 13 lis 2018 o 08:38 Wu, Hao A napisa=C5=82(a): > > Hi Marcin, > > The code changes look good to me. > > Could you please grant me some time for some additional tests for these > patches? Sure. > I will inform you with the results sometime next week. Thanks in advance. > Ard gave his RB to 2/4 and 3/4. Moreover he pointed a typo in 3/4 commit message - should I repost, or could those be included when applying the patches (unless you don't request any code change, of course)? Best regards, Marcin > Best Regards, > Hao Wu > > > > -----Original Message----- > > From: Marcin Wojtas [mailto:mw@semihalf.com] > > Sent: Saturday, November 10, 2018 7:01 AM > > To: edk2-devel@lists.01.org > > Cc: leif.lindholm@linaro.org; Wu, Hao A; Kinney, Michael D; Gao, Liming= ; > > ard.biesheuvel@linaro.org; nadavh@marvell.com; mw@semihalf.com; > > jsd@semihalf.com; tm@semihalf.com; jaz@semihalf.com > > Subject: [PATCH v4 0/4] SdMmcOverride extension > > > > Hi, > > > > Although I could've waited for Hao's remarks, I think it may > > be better if he takes a look at much cleaner code, which > > addresses v3 review comments. > > The newest version of the patchset cleans-up significantly > > patches 2&3 by removing code duplication and other minor > > improvements. > > > > Patches are available in the github: > > https://github.com/MarvellEmbeddedProcessors/edk2-open- > > platform/commits/sdmmc-override-upstream-r20181109 > > > > Please note that extending SdMmcOverride protocol was impacting > > so far the only user of it (Synquacer controller). In paralel > > edk2-platforms patchset, a patch can be found: > > ("Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride") > > which adjust to the new API. > > https://github.com/MarvellEmbeddedProcessors/edk2-open- > > platform/commits/xenon-upstream-r20181109 > > > > I'm looking forward to the comments and remarks. > > > > Best regards, > > Marcin > > > > Changelog: > > v3->v4 > > * 2/4: > > - avoid duplication by calling SdMmcOverride callback in > > SdMmcHcUhsSignaling > > > > * 3/4: > > - avoid duplication by calling SdMmcOverride callback in > > EmmcSwitchClockFreq > > > > * 4/4: > > - add Ard's RB > > > > v2->v3 > > * 1/4: > > - rename new parameter to PhaseData > > - add Ard's RB > > > > * 2/4: > > - s/Controler/Controller/ > > - remove all references to MMC_SDR_50 mode > > - rename and reorder MMC bus modes > > - rename enum: s/SD_MMC_UHS_TIMING/SD_MMC_BUS_MODE/ > > and move it to protocol header in order to drop including private o= ne > > - fix if condition in EmmcSwitchToHighSpeed > > - call SdMmcHcUhsSignaling unconditionally before SdMmcOverride > > callback, so that protocol producer can optionally modify only quir= ky > > timing mode values. > > > > *4/4 > > - bump protocol version to 2 > > - remove redundant assert from SdMmcPciHcDriverBindingStart > > (BaseClkFreq is already checked in SdMmcHcInitClockFreq) > > - update comment in SdMmcHcInitClockFreq > > - restore original DumpCapabilityReg and append > > > > v1 -> v2 > > * Rebase onto newest master > > * 1/4 [new patch] - preparation for extending NotifyPhase > > * 2/4 - UhsSignaling as a part of NotifyPhase > > * 3/4 - SwitchClockFreqPost as a part of NotifyPhase > > * 4/4 - Allow updating BaseClkFreq via Capability instead of the > > independent callback. > > > > > > Marcin Wojtas (2): > > MdeModulePkg/SdMmcPciHcDxe: Add an optional parameter in NotifyPhase > > MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency > > > > Tomasz Michalec (2): > > MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride > > protocol > > MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to > > SdMmcOverride > > > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 6 + > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 42 ++++++- > > MdeModulePkg/Include/Protocol/SdMmcOverride.h | 29 ++++- > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 121 ++++++++++- > > -------- > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 35 ++++-- > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 13 +- > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 124 > > +++++++++++++++++--- > > 7 files changed, 280 insertions(+), 90 deletions(-) > > > > -- > > 2.7.4 >