From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22c.google.com (mail-io0-x22c.google.com [IPv6:2607:f8b0:4001:c06::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9199221DF806C for ; Tue, 29 Aug 2017 08:44:55 -0700 (PDT) Received: by mail-io0-x22c.google.com with SMTP id 81so21864699ioj.5 for ; Tue, 29 Aug 2017 08:47:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=Af062wd0Kv2coVTlu28qsSuVpZkaMDpb0KLbI/ozuBs=; b=GfVtJinln5EvHtnZb8wGdCMX4BZdpaS61ifGICMgShM2QEhCl73mqCap9cYX6M6Xaf SX1gS3L3tBqdE5yllK3QZfwD4Hz6CtuOcP24bh+9lWSXD8pdJY5HxXUAUB0cJ85/O4kw UlU8i2STMyGZWJNZhXrwoymHjssnkErJ1dZ+edxyV0lRDIjEtBWvHVbis2DP7gcHPb08 w9fJvPGyoEGMs9F5UvlMN6ZUmlr5ObLBc7BhMR44Y4Jip2tEm1YTG9+HdvbtgEE8x+Rs tpZWBzMB7HxvtOED/UmBE98pXD32KBCJc31pSAtNyIs4TblnYvs9gWwCA35YTbrVtoE6 HDgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=Af062wd0Kv2coVTlu28qsSuVpZkaMDpb0KLbI/ozuBs=; b=mK+806MTY0oSD4EbnJNyp4soeF7753WRLeCmangzlDPDIZeFtYYdMoHGpnhyRjzr0U 1Ef49skq9UqUT0vT3r0FezeLGTSqngNGX2dJXKv+PySgb5s0F4SzV54hhypIpxCHp6gl i2u7qzTeVQz4fz9jOISWHZ3zFApBlMwEzSlwPlDQjowZdKIBcMf97O03a+q32Vh+nyPV NOl9uXSrvmHsoLmseSmc6/l9Nm0li4MLT0KkUuGpfTRVRtpu4/LM0K2uPFTurMhApqf/ ej9FgrqvQnqhgE5ZViqu1tB9VXl8cw0+D5acrqTz/Nl0wIYbpV9tt0tLcdGE+RFO1M0G JODg== X-Gm-Message-State: AHYfb5he1l5aKWknk9EvSN66rkoy5VU/xwSJBlsKUCsMReW7Usv674v5 E4Fpu4IBV5KQ9eRrNMdaUCQX0KZSh+R8 X-Received: by 10.36.220.66 with SMTP id q63mr2604062itg.32.1504021655478; Tue, 29 Aug 2017 08:47:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.190.199 with HTTP; Tue, 29 Aug 2017 08:47:34 -0700 (PDT) In-Reply-To: <20170829154603.fvhfwp66asipxnoe@bivouac.eciton.net> References: <20170825122554.17819-1-ard.biesheuvel@linaro.org> <20170829154603.fvhfwp66asipxnoe@bivouac.eciton.net> From: Marcin Wojtas Date: Tue, 29 Aug 2017 17:47:34 +0200 Message-ID: To: Leif Lindholm Cc: Ard Biesheuvel , edk2-devel-01 Subject: Re: [PATCH] Platform/Armada/Pp2Dxe: switch to ArmDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 Aug 2017 15:44:55 -0000 Content-Type: text/plain; charset="UTF-8" 2017-08-29 17:46 GMT+02:00 Leif Lindholm : > On Fri, Aug 25, 2017 at 01:25:54PM +0100, Ard Biesheuvel wrote: >> Instead of hardcoding the non-cache coherent nature of this device >> by invoking UncachedMemoryAllocationLib directly for allocating >> shared buffers, switch to DmaLib, which encapsulates this at a >> more abstract level. This allows the driver to be shared with >> platforms that are cache coherent (by simply switching to another >> DmaLib implementation), and removes the hardcoded dependency on >> UncachedMemoryAllocationLib, which will be removed from upstream >> EDK2. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel > > Ah, and there is the non-bogus fix :) > Reviewed-by: Leif Lindholm Please let me just run this on the HW before merge - I'll do it tomorrow. Best regards, Marcin > >> --- >> This depends on patches #1 and #2 of >> https://lists.01.org/pipermail/edk2-devel/2017-August/013740.html >> >> Platform/Marvell/Armada/Armada.dsc.inc | 1 - >> Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 35 ++++++++++++++------ >> Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h | 2 +- >> Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 4 +-- >> 4 files changed, 28 insertions(+), 14 deletions(-) >> >> diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc >> index 4e8f289fcbca..04b108619ac7 100644 >> --- a/Platform/Marvell/Armada/Armada.dsc.inc >> +++ b/Platform/Marvell/Armada/Armada.dsc.inc >> @@ -37,7 +37,6 @@ >> UtmiPhyLib|Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf >> >> DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf >> - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf >> DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf >> >> # Basic utility libraries >> diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c >> index 8de2473d09f0..1e2ccd0dbe9d 100644 >> --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c >> +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c >> @@ -175,9 +175,10 @@ Pp2DxeBmPoolInit ( >> VOID >> ) >> { >> - INTN Index; >> - UINT8 *PoolAddr; >> - UINT32 PoolSize = (sizeof(VOID *) * MVPP2_BM_SIZE) * 2 + MVPP2_BM_POOL_PTR_ALIGN; >> + INTN Index; >> + UINT8 *PoolAddr; >> + UINT32 PoolSize; >> + EFI_STATUS Status; >> >> ASSERT(MVPP2_BM_POOL_PTR_ALIGN >= sizeof(UINTN)); >> >> @@ -194,11 +195,16 @@ Pp2DxeBmPoolInit ( >> return EFI_OUT_OF_RESOURCES; >> } >> >> - PoolAddr = UncachedAllocateAlignedZeroPool (PoolSize, MVPP2_BM_POOL_PTR_ALIGN); >> - if (PoolAddr == NULL) { >> - return EFI_OUT_OF_RESOURCES; >> + Status = DmaAllocateAlignedBuffer (EfiBootServicesData, >> + EFI_SIZE_TO_PAGES (PoolSize), >> + MVPP2_BM_POOL_PTR_ALIGN, >> + (VOID **)&PoolAddr); >> + if (EFI_ERROR (Status)) { >> + goto FreePools; >> } >> >> + ZeroMem (PoolAddr, PoolSize); >> + >> Mvpp2Shared->BmPools->Id = MVPP2_BM_POOL; >> Mvpp2Shared->BmPools->VirtAddr = (UINT32 *)PoolAddr; >> Mvpp2Shared->BmPools->PhysAddr = (UINTN)PoolAddr; >> @@ -206,6 +212,10 @@ Pp2DxeBmPoolInit ( >> Mvpp2BmPoolHwCreate(Mvpp2Shared, Mvpp2Shared->BmPools, MVPP2_BM_SIZE); >> >> return EFI_SUCCESS; >> + >> +FreePools: >> + FreePool (Mvpp2Shared->BmPools); >> + return Status; >> } >> >> /* Enable and fill BM pool */ >> @@ -1169,12 +1179,17 @@ Pp2DxeInitialise ( >> Mvpp2Shared->Tclk = PcdGet32 (PcdPp2ClockFrequency); >> >> /* Prepare buffers */ >> - BufferSpace = UncachedAllocateAlignedZeroPool (BD_SPACE, MVPP2_BUFFER_ALIGN_SIZE); >> - if (BufferSpace == NULL) { >> - DEBUG((DEBUG_ERROR, "Failed to allocate buffer space\n")); >> - return EFI_OUT_OF_RESOURCES; >> + Status = DmaAllocateAlignedBuffer (EfiBootServicesData, >> + EFI_SIZE_TO_PAGES (BD_SPACE), >> + MVPP2_BUFFER_ALIGN_SIZE, >> + &BufferSpace); >> + if (EFI_ERROR (Status)) { >> + DEBUG ((DEBUG_ERROR, "Failed to allocate buffer space\n")); >> + return Status; >> } >> >> + ZeroMem (BufferSpace, BD_SPACE); >> + >> BufferLocation.TxDescs = BufferSpace; >> BufferLocation.AggrTxDescs = (MVPP2_TX_DESC *)((UINTN)BufferSpace + MVPP2_MAX_TXD * sizeof(MVPP2_TX_DESC)); >> BufferLocation.RxDescs = (MVPP2_RX_DESC *)((UINTN)BufferSpace + >> diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h >> index 3bb0c4a65376..a179638fd609 100644 >> --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h >> +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h >> @@ -46,13 +46,13 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> #include >> #include >> #include >> -#include >> >> #include "Mvpp2LibHw.h" >> >> diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf >> index 87cc5e8ded74..9052fe27b7f3 100644 >> --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf >> +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf >> @@ -43,13 +43,14 @@ >> Mvpp2Lib.c >> >> [Packages] >> + EmbeddedPkg/EmbeddedPkg.dec >> MdePkg/MdePkg.dec >> MdeModulePkg/MdeModulePkg.dec >> - ArmPlatformPkg/ArmPlatformPkg.dec >> ArmPkg/ArmPkg.dec >> Platform/Marvell/Marvell.dec >> >> [LibraryClasses] >> + DmaLib >> IoLib >> PcdLib >> BaseLib >> @@ -60,7 +61,6 @@ >> UefiDriverEntryPoint >> UefiBootServicesTableLib >> MemoryAllocationLib >> - UncachedMemoryAllocationLib >> CacheMaintenanceLib >> >> [Protocols] >> -- >> 2.11.0 >>