From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qt1-f178.google.com (mail-qt1-f178.google.com [209.85.160.178]) by mx.groups.io with SMTP id smtpd.web11.13367.1591370405476642067 for ; Fri, 05 Jun 2020 08:20:05 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=i2iPzb09; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.160.178, mailfrom: mw@semihalf.com) Received: by mail-qt1-f178.google.com with SMTP id w90so8719763qtd.8 for ; Fri, 05 Jun 2020 08:20:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:from:date:message-id:subject:to:cc; bh=dRJw/2Eof18X3VuP6PQJnSt+cGHsZaEKo0qgtqG6uIw=; b=i2iPzb09NTQcy/07ajfnVes98BsxA7SiuetWjLofiJAaBANSqutGWwBd97QwBB0j5h UaluXUS9B9wHGVeXv0ZUtXvRBuh8SBr7uxMC0GA8yt7WtxUW3kdxdtSoKxErpXyD2nRC 3Cg8AwtJcFfGyTnkt/wVdab9p1rUHrzprYCZGvB3y83vrIq5dpayWKInGETNvibbq+3Y Xe2vFwel3uek3/AmOicMfPouPgI2ujvADq/4zR30Qrpyt04nsVln7WmIfWOfDVxvQUjR 6ik//CeYAx5ZgjikUMBz+bYOpE1xETjCEfmciEH3P9FbLGANiA3RT59oJ9SnMyJvIMmp jSfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=dRJw/2Eof18X3VuP6PQJnSt+cGHsZaEKo0qgtqG6uIw=; b=FEvWXcA9aMx6PFPonZjFhLy6Qsb7WyzjwNXMbcbWg3SPkKc7Bxf3YkbguVK0KEKtgL 24ltpffsvVnqyU29dUW/T6GI7Bs9l7E3pRTeNhEKzdX+Xi99YVTceQVA7ybCWGIFqhZD ss7xi20WLEEb4CSNl4tHu/2ESd8wExjGZMs8w3DLixa7Bmnrw9Z0rGS8fVeLvE+zWHIg Vbzv0lbx0ZcdGNE3iX0O4+z0Hjw6hIEGZDT8InexxycbzURbZuNHW/ja0DcNrLXhgbQ1 TEfnZNeT3IhopOv4hT7n3GpG0Utjfg/oOXHyUAkWvZmYtt9wdurfcw/iURbtwdHoBSLZ D/lQ== X-Gm-Message-State: AOAM533dW5wGMob0NUOYHHkap49jnabhkf1h8DbjDaN198xZVqBtpYqa L7tgzK1bIfHbTPANWWxZwrkO5TjwtwQR9u4jSV3Dh//P X-Google-Smtp-Source: ABdhPJzWv0sLBIPjh/EVd3m9OJ7XPEpCWwhqF04U+9njiO0OO0GjOkt1nBwueJSGAMpKqCir9IVfbtAqdI7smR3rRI0= X-Received: by 2002:ac8:42c3:: with SMTP id g3mr10216087qtm.313.1591370404371; Fri, 05 Jun 2020 08:20:04 -0700 (PDT) MIME-Version: 1.0 From: "Marcin Wojtas" Date: Fri, 5 Jun 2020 17:19:53 +0200 Message-ID: Subject: Additional configuration options on Armada/Cn913x To: edk2-devel-groups-io Cc: Leif Lindholm , Ard Biesheuvel , Greg V Content-Type: multipart/alternative; boundary="000000000000a8b44305a757cb31" --000000000000a8b44305a757cb31 Content-Type: text/plain; charset="UTF-8" Hi, I'd like to ask for comments before I develop the actual code - currently we have 2 workarounds done specifically for Linux: a. ECAM shift in PCIE b. SPCR address space definition Both above are not needed e.g. in FreeBSD and I was requested to add their optional disabling. The idea is to add dedicated variables that would optionally allow to disable the quirks, accessible via BootManager. Questions: - Would above be acceptable or is there a better way to handle such cases? - In case it's fine, is there a dedicated place in the BootManager menu to add custom switches? - Are you aware of good examples for adding custom options? Best regards, Marcin --000000000000a8b44305a757cb31 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi,

I'd like to ask for comments be= fore I develop the actual code - currently we have 2 workarounds done speci= fically for Linux:
a. ECAM shift in PCIE
b. SPCR addres= s space definition

Both above are not needed e.g. = in FreeBSD and I was requested to add their optional disabling. The idea is= to add dedicated variables that would optionally allow to disable the quir= ks, accessible via BootManager. Questions:

- Would= above be acceptable or is there a better way to handle=C2=A0such cases?
- In case it's fine, is there a dedicated place in the BootMana= ger menu to add custom switches?
- Are you aware of good examples= for adding custom options?

Best regards,
Marcin
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