From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::241; helo=mail-it0-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-it0-x241.google.com (mail-it0-x241.google.com [IPv6:2607:f8b0:4001:c0b::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9264D210EE4CF for ; Mon, 18 Jun 2018 09:27:48 -0700 (PDT) Received: by mail-it0-x241.google.com with SMTP id p185-v6so12840919itp.4 for ; Mon, 18 Jun 2018 09:27:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=B5JOMryivRDdzp53ZNdvmmhURQ9CzNx1egfX5hVhg4U=; b=uvcAJR9Gj1gKQgmpZoJnWXJCqzrjEtwNCaPalSuDxBsM+f2j0FcXgoJg1M7Mq6lDVE k0NaiMrEITGfgXQ2OMsoaz8kSyuHEICpRFOqcN+d7W26vlV3GY9dFu9vP0HLtsiozMOC AkhDASu4ktD21e0em2YORgIsWIbplhyuqiJQomsmw2KS3yPxpG+yCmhVlJc+7yETYXwY +TeAY1Q/DPX5X3gJ3K18IHSxwOvueUbbA66eKRLXCOp0risGvKOMXp0+skr9/axC41jI g1WZnuiiE8FTGwDGHOaVh47X6/QdG2mogq0cmiTjl6dBFx3+UbIIJBowoH5I26I2I/bh 3/3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=B5JOMryivRDdzp53ZNdvmmhURQ9CzNx1egfX5hVhg4U=; b=eE8+TlgVKs6AVLlaL2QJ+uZhLywN6hU+7MxRRCWVvirOReRQq3jF+oDh0oIdA4J45D bvrU9vBKpklX5iv2T9uCVCMUIg8teDykEWiJ0CuftOLID9qccR6YZuBzJUoAuzJh5CDq 0PsO8zrjm0KCB6mNOjeLldrHmhzUPeXx/LN/pnrbNLOO02v9AtC1YqVZ+eb988efm/ee aiAzCgjJJRhE9J+Tt4WPK/NuJlHWtS7PQiQ5r43UTEoXpmuGcBIVho+/XXUeWR4e9jPD 8YBBguhg/0nTBvbBgjoL4V4YQ46GHHsoTK1jvXHnyyYgbOsHqHzwTvr6VpMGBzuhuAK6 UKdg== X-Gm-Message-State: APt69E30WgV9q+ysxRE7MsgftXQFrtXfQGi586176XieCPXFRaGKQHHM Ev3goiJ445mA2iteA9gz+mFHQHwYa0JUmE+E+An09w== X-Google-Smtp-Source: ADUXVKL6Gtojy6K4GB92E9+1i4OwtuPcnLd/tXPrCru6ceA/ovkVN7QWL+NM8XkhYV594Rxt/n4Kd3jjefzq54TMgrU= X-Received: by 2002:a24:f6c8:: with SMTP id u191-v6mr9583129ith.56.1529339267750; Mon, 18 Jun 2018 09:27:47 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:c6cc:0:0:0:0:0 with HTTP; Mon, 18 Jun 2018 09:27:47 -0700 (PDT) In-Reply-To: <20180618162340.pihbaer7zylpushy@bivouac.eciton.net> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> <1529266325-18371-19-git-send-email-mw@semihalf.com> <20180618162340.pihbaer7zylpushy@bivouac.eciton.net> From: Marcin Wojtas Date: Mon, 18 Jun 2018 18:27:47 +0200 Message-ID: To: Leif Lindholm Cc: edk2-devel-01 , Ard Biesheuvel , nadavh@marvell.com, Hua Jing , semihalf-dabros-jan , Grzegorz Jaszczyk Subject: Re: [platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jun 2018 16:27:48 -0000 Content-Type: text/plain; charset="UTF-8" 2018-06-18 18:23 GMT+02:00 Leif Lindholm : > On Sun, Jun 17, 2018 at 10:11:58PM +0200, Marcin Wojtas wrote: >> This patch introduces new library callback (ArmadaSoCDescMdioGet ()), >> which dynamically allocates and fills MV_SOC_MDIO_DESC structure with >> the SoC description of Mdio controllers. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Marcin Wojtas >> --- >> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 ++++ >> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 ++++++++++ >> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++ >> 3 files changed, 50 insertions(+) >> >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h >> index f372ca0..c864f94 100644 >> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h >> @@ -38,6 +38,12 @@ >> #define MV_SOC_COMPHY_MUX_BITS 4 >> >> // >> +// Platform description of MDIO controllers >> +// >> +#define MV_SOC_MDIO_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x12A200) > > Still pointless double parentheses around this Cp :) > Save that for a single patch later on, as commented on earlier patch > in set. > (This version already fixes the bug.) I can quickly update each patch, unless you really wish to do it separately. Please confirm your preferences. Thanks, Marcin > > Reviewed-by: Leif Lindholm > >> +#define MV_SOC_MDIO_ID(Cp) (Cp) >> + >> +// >> // Platform description of PP2 NIC >> // >> #define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp)) >> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h >> index a133d1c..304d068 100644 >> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h >> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h >> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet ( >> ); >> >> // >> +// MDIO >> +// >> +typedef struct { >> + UINTN MdioId; >> + UINTN MdioBaseAddress; >> +} MV_SOC_MDIO_DESC; >> + >> +EFI_STATUS >> +EFIAPI >> +ArmadaSoCDescMdioGet ( >> + IN OUT MV_SOC_MDIO_DESC **MdioDesc, >> + IN OUT UINTN *DescCount >> + ); >> + >> +// >> // NonDiscoverable devices SoC description >> // >> // AHCI >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c >> index 580c0f4..652677f 100644 >> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c >> @@ -63,6 +63,35 @@ ArmadaSoCDescComPhyGet ( >> >> EFI_STATUS >> EFIAPI >> +ArmadaSoCDescMdioGet ( >> + IN OUT MV_SOC_MDIO_DESC **MdioDesc, >> + IN OUT UINTN *DescCount >> + ) >> +{ >> + MV_SOC_MDIO_DESC *Desc; >> + UINTN CpCount, CpIndex; >> + >> + CpCount = FixedPcdGet8 (PcdMaxCpCount); >> + >> + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC)); >> + if (Desc == NULL) { >> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); >> + return EFI_OUT_OF_RESOURCES; >> + } >> + >> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) { >> + Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex); >> + Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex); >> + } >> + >> + *MdioDesc = Desc; >> + *DescCount = CpCount; >> + >> + return EFI_SUCCESS; >> +} >> + >> +EFI_STATUS >> +EFIAPI >> ArmadaSoCDescAhciGet ( >> IN OUT MV_SOC_AHCI_DESC **AhciDesc, >> IN OUT UINTN *DescCount >> -- >> 2.7.4 >>