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Wed, 9 Jan 2019 10:53:37 -0800 Received: from fmsmsx103.amr.corp.intel.com ([169.254.2.197]) by fmsmsx123.amr.corp.intel.com ([169.254.7.98]) with mapi id 14.03.0415.000; Wed, 9 Jan 2019 10:53:37 -0800 From: "Carsey, Jaben" To: "Feng, Bob C" , "edk2-devel@lists.01.org" CC: "Gao, Liming" Thread-Topic: [Patch 3/3 V2] BaseTools: Remove unused logic from C tools Thread-Index: AQHUp/YzHa2Oq1cWyUi6Sp3TrnYjvKWnSPmA Date: Wed, 9 Jan 2019 18:53:36 +0000 Message-ID: References: <20190109083429.53896-1-bob.c.feng@intel.com> In-Reply-To: <20190109083429.53896-1-bob.c.feng@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWVlNDc1Y2UtOTliZS00M2NmLTlkMGMtYTkxMzU4NzRkZjhjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNXJxMjhGNGVJK1wvVkpGNnhNeVZFM3EwNDMybWhyYzBuTXpDYW1ZTHE2V3VYRDFWczdVd2I4dWdqcXJwWTBMUkUifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.107] MIME-Version: 1.0 Subject: Re: [Patch 3/3 V2] BaseTools: Remove unused logic from C tools X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Jan 2019 18:53:38 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jaben Carsey Note: in BaseTools/Source/C/EfiRom/EfiRom.h. it looks like you both delete= and add EBC. > -----Original Message----- > From: Feng, Bob C > Sent: Wednesday, January 09, 2019 12:34 AM > To: edk2-devel@lists.01.org > Cc: Feng, Bob C ; Gao, Liming > ; Carsey, Jaben > Subject: [Patch 3/3 V2] BaseTools: Remove unused logic from C tools > Importance: High >=20 > From: "Feng, Bob C" >=20 > https://bugzilla.tianocore.org/show_bug.cgi?id=3D1350 > Remove IA64 support from BaseTools C code. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Bob Feng > Cc: Liming Gao > Cc: Jaben Carsey > --- > BaseTools/Source/C/Common/BasePeCoff.c | 14 +- > BaseTools/Source/C/Common/PeCoffLoaderEx.c | 162 +----------------- > BaseTools/Source/C/EfiRom/EfiRom.h | 3 +- > BaseTools/Source/C/GenFv/GenFvInternalLib.c | 72 +------- > BaseTools/Source/C/GenFv/GenFvInternalLib.h | 10 -- > BaseTools/Source/C/GenFw/Elf64Convert.c | 5 - > BaseTools/Source/C/GenFw/GenFw.c | 6 +- > BaseTools/Source/C/GenFw/elf_common.h | 85 --------- > .../C/Include/IndustryStandard/PeImage.h | 3 - > BaseTools/Source/C/Makefiles/header.makefile | 1 - > BaseTools/Source/C/VolInfo/VolInfo.c | 2 +- > 11 files changed, 10 insertions(+), 353 deletions(-) >=20 > diff --git a/BaseTools/Source/C/Common/BasePeCoff.c > b/BaseTools/Source/C/Common/BasePeCoff.c > index 1d89a300de..d5cefbd0b0 100644 > --- a/BaseTools/Source/C/Common/BasePeCoff.c > +++ b/BaseTools/Source/C/Common/BasePeCoff.c > @@ -54,17 +54,10 @@ PeCoffLoaderRelocateIa32Image ( > IN OUT CHAR8 *Fixup, > IN OUT CHAR8 **FixupData, > IN UINT64 Adjust > ); >=20 > -RETURN_STATUS > -PeCoffLoaderRelocateIpfImage ( > - IN UINT16 *Reloc, > - IN OUT CHAR8 *Fixup, > - IN OUT CHAR8 **FixupData, > - IN UINT64 Adjust > - ); >=20 > RETURN_STATUS > PeCoffLoaderRelocateArmImage ( > IN UINT16 **Reloc, > IN OUT CHAR8 *Fixup, > @@ -182,11 +175,10 @@ Returns: > } else { > ImageContext->Machine =3D TeHdr->Machine; > } >=20 > if (ImageContext->Machine !=3D EFI_IMAGE_MACHINE_IA32 && \ > - ImageContext->Machine !=3D EFI_IMAGE_MACHINE_IA64 && \ > ImageContext->Machine !=3D EFI_IMAGE_MACHINE_X64 && \ > ImageContext->Machine !=3D EFI_IMAGE_MACHINE_ARMT && \ > ImageContext->Machine !=3D EFI_IMAGE_MACHINE_EBC && \ > ImageContext->Machine !=3D EFI_IMAGE_MACHINE_AARCH64) { > if (ImageContext->Machine =3D=3D IMAGE_FILE_MACHINE_ARM) { > @@ -814,13 +806,10 @@ Returns: > Status =3D PeCoffLoaderRelocateIa32Image (Reloc, Fixup, &Fixup= Data, > Adjust); > break; > case EFI_IMAGE_MACHINE_ARMT: > Status =3D PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &Fixup= Data, > Adjust); > break; > - case EFI_IMAGE_MACHINE_IA64: > - Status =3D PeCoffLoaderRelocateIpfImage (Reloc, Fixup, &FixupD= ata, > Adjust); > - break; > default: > Status =3D RETURN_UNSUPPORTED; > break; > } > if (RETURN_ERROR (Status)) { > @@ -1317,13 +1306,12 @@ PeCoffLoaderGetPdbPointer ( > // Assume PE32 image with IA32 Machine field. > // > Magic =3D EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC; > break; > case EFI_IMAGE_MACHINE_X64: > - case EFI_IMAGE_MACHINE_IPF: > // > - // Assume PE32+ image with X64 or IPF Machine field > + // Assume PE32+ image with X64 Machine field > // > Magic =3D EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC; > break; > default: > // > diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c > b/BaseTools/Source/C/Common/PeCoffLoaderEx.c > index 2d9a2a8978..fa8c7e3d17 100644 > --- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c > +++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c > @@ -1,7 +1,7 @@ > /** @file > -IA32, X64 and IPF Specific relocation fixups > +IA32 and X64 Specific relocation fixups >=20 > Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
> Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the BS= D > License > @@ -97,170 +97,10 @@ Returns: > --*/ > { > return RETURN_UNSUPPORTED; > } >=20 > -RETURN_STATUS > -PeCoffLoaderRelocateIpfImage ( > - IN UINT16 *Reloc, > - IN OUT CHAR8 *Fixup, > - IN OUT CHAR8 **FixupData, > - IN UINT64 Adjust > - ) > -/*++ > - > -Routine Description: > - > - Performs an Itanium-based specific relocation fixup > - > -Arguments: > - > - Reloc - Pointer to the relocation record > - > - Fixup - Pointer to the address to fix up > - > - FixupData - Pointer to a buffer to log the fixups > - > - Adjust - The offset to adjust the fixup > - > -Returns: > - > - Status code > - > ---*/ > -{ > - UINT64 *F64; > - UINT64 FixupVal; > - > - switch ((*Reloc) >> 12) { > - > - case EFI_IMAGE_REL_BASED_IA64_IMM64: > - > - // > - // Align it to bundle address before fixing up the > - // 64-bit immediate value of the movl instruction. > - // > - > - Fixup =3D (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15)); > - FixupVal =3D (UINT64)0; > - > - // > - // Extract the lower 32 bits of IMM64 from bundle > - // > - EXT_IMM64(FixupVal, > - (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X, > - IMM64_IMM7B_SIZE_X, > - IMM64_IMM7B_INST_WORD_POS_X, > - IMM64_IMM7B_VAL_POS_X > - ); > - > - EXT_IMM64(FixupVal, > - (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X, > - IMM64_IMM9D_SIZE_X, > - IMM64_IMM9D_INST_WORD_POS_X, > - IMM64_IMM9D_VAL_POS_X > - ); > - > - EXT_IMM64(FixupVal, > - (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X, > - IMM64_IMM5C_SIZE_X, > - IMM64_IMM5C_INST_WORD_POS_X, > - IMM64_IMM5C_VAL_POS_X > - ); > - > - EXT_IMM64(FixupVal, > - (UINT32 *)Fixup + IMM64_IC_INST_WORD_X, > - IMM64_IC_SIZE_X, > - IMM64_IC_INST_WORD_POS_X, > - IMM64_IC_VAL_POS_X > - ); > - > - EXT_IMM64(FixupVal, > - (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X, > - IMM64_IMM41a_SIZE_X, > - IMM64_IMM41a_INST_WORD_POS_X, > - IMM64_IMM41a_VAL_POS_X > - ); > - > - // > - // Update 64-bit address > - // > - FixupVal +=3D Adjust; > - > - // > - // Insert IMM64 into bundle > - // > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X), > - IMM64_IMM7B_SIZE_X, > - IMM64_IMM7B_INST_WORD_POS_X, > - IMM64_IMM7B_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X), > - IMM64_IMM9D_SIZE_X, > - IMM64_IMM9D_INST_WORD_POS_X, > - IMM64_IMM9D_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X), > - IMM64_IMM5C_SIZE_X, > - IMM64_IMM5C_INST_WORD_POS_X, > - IMM64_IMM5C_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X), > - IMM64_IC_SIZE_X, > - IMM64_IC_INST_WORD_POS_X, > - IMM64_IC_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X), > - IMM64_IMM41a_SIZE_X, > - IMM64_IMM41a_INST_WORD_POS_X, > - IMM64_IMM41a_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X), > - IMM64_IMM41b_SIZE_X, > - IMM64_IMM41b_INST_WORD_POS_X, > - IMM64_IMM41b_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X), > - IMM64_IMM41c_SIZE_X, > - IMM64_IMM41c_INST_WORD_POS_X, > - IMM64_IMM41c_VAL_POS_X > - ); > - > - INS_IMM64(FixupVal, > - ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X), > - IMM64_SIGN_SIZE_X, > - IMM64_SIGN_INST_WORD_POS_X, > - IMM64_SIGN_VAL_POS_X > - ); > - > - F64 =3D (UINT64 *) Fixup; > - if (*FixupData !=3D NULL) { > - *FixupData =3D ALIGN_POINTER(*FixupData, sizeof(UINT64)); > - *(UINT64 *)(*FixupData) =3D *F64; > - *FixupData =3D *FixupData + sizeof(UINT64); > - } > - break; > - > - default: > - return RETURN_UNSUPPORTED; > - } > - > - return RETURN_SUCCESS; > -} >=20 > /** > Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and > return the immediate data encoded in the instruction >=20 > diff --git a/BaseTools/Source/C/EfiRom/EfiRom.h > b/BaseTools/Source/C/EfiRom/EfiRom.h > index ea179f5487..af78034727 100644 > --- a/BaseTools/Source/C/EfiRom/EfiRom.h > +++ b/BaseTools/Source/C/EfiRom/EfiRom.h > @@ -113,13 +113,12 @@ typedef struct { > // > // Machine Types > // > static STRING_LOOKUP mMachineTypes[] =3D { > { EFI_IMAGE_MACHINE_IA32, "IA32" }, > - { EFI_IMAGE_MACHINE_IA64, "IA64" }, > - { EFI_IMAGE_MACHINE_EBC, "EBC" }, > { EFI_IMAGE_MACHINE_X64, "X64" }, > + { EFI_IMAGE_MACHINE_EBC, "EBC" }, > { EFI_IMAGE_MACHINE_ARMT, "ARM" }, > { EFI_IMAGE_MACHINE_AARCH64, "AA64" }, > { 0, NULL } > }; >=20 > diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c > b/BaseTools/Source/C/GenFv/GenFvInternalLib.c > index 32bbcce0a6..4d0339e1f9 100644 > --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c > +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c > @@ -903,19 +903,11 @@ Returns: > } else { > fprintf (FvMapFile, "%s (Fixed Flash Address, ", KeyWord); > fprintf (FvMapFile, "BaseAddress=3D0x%010llx, ", (unsigned long long= ) > (ImageBaseAddress + Offset)); > } >=20 > - if (FfsFile->Type !=3D EFI_FV_FILETYPE_SECURITY_CORE && pImageContext- > >Machine =3D=3D EFI_IMAGE_MACHINE_IA64) { > - // > - // Process IPF PLABEL to get the real address after the image has be= en > rebased. > - // PLABEL structure is got by AddressOfEntryPoint offset to ImageBuf= fer > stored in pImageContext->Handle. > - // > - fprintf (FvMapFile, "EntryPoint=3D0x%010llx", (unsigned long long) > (*(UINT64 *)((UINTN) pImageContext->Handle + (UINTN) > AddressOfEntryPoint))); > - } else { > - fprintf (FvMapFile, "EntryPoint=3D0x%010llx", (unsigned long long) > (ImageBaseAddress + AddressOfEntryPoint)); > - } > + fprintf (FvMapFile, "EntryPoint=3D0x%010llx", (unsigned long long) > (ImageBaseAddress + AddressOfEntryPoint)); > fprintf (FvMapFile, ")\n"); >=20 > fprintf (FvMapFile, "(GUID=3D%s", FileGuidName); > TextVirtualAddress =3D 0; > DataVirtualAddress =3D 0; > @@ -1539,22 +1531,19 @@ Returns: > UINT32 EntryPoint; > UINT32 BaseOfCode; > UINT16 MachineType; > EFI_PHYSICAL_ADDRESS PeiCorePhysicalAddress; > EFI_PHYSICAL_ADDRESS SecCorePhysicalAddress; > - EFI_PHYSICAL_ADDRESS *SecCoreEntryAddressPtr; > INT32 Ia32SecEntryOffset; > UINT32 *Ia32ResetAddressPtr; > UINT8 *BytePointer; > UINT8 *BytePointer2; > UINT16 *WordPointer; > UINT16 CheckSum; > UINT32 IpiVector; > UINTN Index; > EFI_FFS_FILE_STATE SavedState; > - UINT64 FitAddress; > - FIT_TABLE *FitTablePtr; > BOOLEAN Vtf0Detected; > UINT32 FfsHeaderSize; > UINT32 SecHeaderSize; >=20 > // > @@ -1690,66 +1679,11 @@ Returns: > PeiCorePhysicalAddress +=3D (UINTN) Pe32Section.Pe32Section + > SecHeaderSize - (UINTN) FvImage->FileImage; > PeiCorePhysicalAddress +=3D EntryPoint; > DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Addre= ss =3D > 0x%llX", (unsigned long long) PeiCorePhysicalAddress); > } >=20 > - if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA64) { > - // > - // Update PEI_CORE address > - // > - // > - // Set the uncached attribute bit in the physical address > - // > - PeiCorePhysicalAddress |=3D 0x8000000000000000ULL; > - > - // > - // Check if address is aligned on a 16 byte boundary > - // > - if (PeiCorePhysicalAddress & 0xF) { > - Error (NULL, 0, 3000, "Invalid", > - "PEI_CORE entry point is not aligned on a 16 byte boundary, addr= ess > specified is %llXh.", > - (unsigned long long) PeiCorePhysicalAddress > - ); > - return EFI_ABORTED; > - } > - // > - // First Get the FIT table address > - // > - FitAddress =3D (*(UINT64 *) (FvImage->Eof - IPF_FIT_ADDRESS_OFFSET)= ) & > 0xFFFFFFFF; > - > - FitTablePtr =3D (FIT_TABLE *) (FvImage->FileImage + (FitAddress - Fv= Info- > >BaseAddress)); > - > - Status =3D UpdatePeiCoreEntryInFit (FitTablePtr, > PeiCorePhysicalAddress); > - > - if (!EFI_ERROR (Status)) { > - UpdateFitCheckSum (FitTablePtr); > - } > - > - // > - // Update SEC_CORE address > - // > - // > - // Set the uncached attribute bit in the physical address > - // > - SecCorePhysicalAddress |=3D 0x8000000000000000ULL; > - // > - // Check if address is aligned on a 16 byte boundary > - // > - if (SecCorePhysicalAddress & 0xF) { > - Error (NULL, 0, 3000, "Invalid", > - "SALE_ENTRY entry point is not aligned on a 16 byte boundary, ad= dress > specified is %llXh.", > - (unsigned long long) SecCorePhysicalAddress > - ); > - return EFI_ABORTED; > - } > - // > - // Update the address > - // > - SecCoreEntryAddressPtr =3D (EFI_PHYSICAL_ADDRESS *) ((UINTN) > FvImage->Eof - IPF_SALE_ENTRY_ADDRESS_OFFSET); > - *SecCoreEntryAddressPtr =3D SecCorePhysicalAddress; > - > - } else if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA32 || MachineType = =3D=3D > EFI_IMAGE_MACHINE_X64) { > +if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA32 || MachineType =3D=3D > EFI_IMAGE_MACHINE_X64) { > if (PeiCorePhysicalAddress !=3D 0) { > // > // Get the location to update > // > Ia32ResetAddressPtr =3D (UINT32 *) ((UINTN) FvImage->Eof - > IA32_PEI_CORE_ENTRY_OFFSET); > @@ -2434,11 +2368,11 @@ Returns: > } >=20 > // > // Verify machine type is supported > // > - if ((*MachineType !=3D EFI_IMAGE_MACHINE_IA32) && (*MachineType !=3D > EFI_IMAGE_MACHINE_IA64) && (*MachineType !=3D > EFI_IMAGE_MACHINE_X64) && (*MachineType !=3D > EFI_IMAGE_MACHINE_EBC) && > + if ((*MachineType !=3D EFI_IMAGE_MACHINE_IA32) && (*MachineType !=3D > EFI_IMAGE_MACHINE_X64) && (*MachineType !=3D > EFI_IMAGE_MACHINE_EBC) && > (*MachineType !=3D EFI_IMAGE_MACHINE_ARMT) && (*MachineType !=3D > EFI_IMAGE_MACHINE_AARCH64)) { > Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the P= E32 > file."); > return EFI_UNSUPPORTED; > } >=20 > diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.h > b/BaseTools/Source/C/GenFv/GenFvInternalLib.h > index 6cfa370645..4476b06a23 100644 > --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.h > +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.h > @@ -171,20 +171,10 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF > ANY KIND, EITHER EXPRESS OR IMPLIED. > // > // Defines to calculate the offset for IA32 SEC CORE entry point > // > #define IA32_SEC_CORE_ENTRY_OFFSET 0xD >=20 > -// > -// Defines to calculate the FIT table > -// > -#define IPF_FIT_ADDRESS_OFFSET 0x20 > - > -// > -// Defines to calculate the offset for SALE_ENTRY > -// > -#define IPF_SALE_ENTRY_ADDRESS_OFFSET 0x18 > - > // > // Symbol file definitions, current max size if 512K > // > #define SYMBOL_FILE_SIZE 0x80000 >=20 > diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c > b/BaseTools/Source/C/GenFw/Elf64Convert.c > index 469979c3b1..0a5237dd14 100644 > --- a/BaseTools/Source/C/GenFw/Elf64Convert.c > +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c > @@ -484,11 +484,10 @@ ScanSections64 ( > // > mCoffOffset =3D sizeof(EFI_IMAGE_DOS_HEADER) + 0x40; > mNtHdrOffset =3D mCoffOffset; > switch (mEhdr->e_machine) { > case EM_X86_64: > - case EM_IA_64: > case EM_AARCH64: > mCoffOffset +=3D sizeof (EFI_IMAGE_NT_HEADERS64); > break; > default: > VerboseMsg ("%s unknown e_machine type %hu. Assume X64", > mInImageName, mEhdr->e_machine); > @@ -691,14 +690,10 @@ ScanSections64 ( > switch (mEhdr->e_machine) { > case EM_X86_64: > NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_X64; > NtHdr->Pe32Plus.OptionalHeader.Magic =3D > EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC; > break; > - case EM_IA_64: > - NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_IPF; > - NtHdr->Pe32Plus.OptionalHeader.Magic =3D > EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC; > - break; > case EM_AARCH64: > NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_AARCH64; > NtHdr->Pe32Plus.OptionalHeader.Magic =3D > EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC; > break; > default: > diff --git a/BaseTools/Source/C/GenFw/GenFw.c > b/BaseTools/Source/C/GenFw/GenFw.c > index 7976bec60a..37278bbc68 100644 > --- a/BaseTools/Source/C/GenFw/GenFw.c > +++ b/BaseTools/Source/C/GenFw/GenFw.c > @@ -1012,11 +1012,11 @@ Returns: > free ((VOID *) MemoryImagePointer); >=20 > // > // Update Image Base Address > // > - if ((ImgHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (ImgHdr- > >Pe32.FileHeader.Machine !=3D IMAGE_FILE_MACHINE_IA64)) { > + if ((ImgHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) { > ImgHdr->Pe32.OptionalHeader.ImageBase =3D (UINT32) > NewPe32BaseAddress; > } else if (ImgHdr->Pe32Plus.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) { > ImgHdr->Pe32Plus.OptionalHeader.ImageBase =3D NewPe32BaseAddress; > } else { > Error (NULL, 0, 3000, "Invalid", "unknown PE magic signature %X in P= E32 > image %s", > @@ -2178,11 +2178,11 @@ Returns: >=20 > // > // Set new base address into image > // > if (mOutImageType =3D=3D FW_REBASE_IMAGE || mOutImageType =3D=3D > FW_SET_ADDRESS_IMAGE) { > - if ((PeHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (PeHdr- > >Pe32.FileHeader.Machine !=3D IMAGE_FILE_MACHINE_IA64)) { > + if ((PeHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) { > if (NewBaseAddress >=3D 0x100000000ULL) { > Error (NULL, 0, 3000, "Invalid", "New base address is larger tha= n 4G for > 32bit PE image"); > goto Finish; > } > } > @@ -2449,11 +2449,11 @@ Returns: >=20 > // > // Zero the .pdata section for X64 machine and don't check the Debug > Directory is empty > // For Itaninum and X64 Image, remove .pdata section. > // > - if ((!KeepExceptionTableFlag && PeHdr->Pe32.FileHeader.Machine =3D= =3D > IMAGE_FILE_MACHINE_X64) || PeHdr->Pe32.FileHeader.Machine =3D=3D > IMAGE_FILE_MACHINE_IA64) { > + if ((!KeepExceptionTableFlag && PeHdr->Pe32.FileHeader.Machine =3D= =3D > IMAGE_FILE_MACHINE_X64)) { > if (Optional64->NumberOfRvaAndSizes > > EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION && > Optional64- > >DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION].VirtualAddress > !=3D 0 && > Optional64- > >DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION].Size !=3D 0) { > SectionHeader =3D (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) > &(PeHdr->Pe32.OptionalHeader) + PeHdr- > >Pe32.FileHeader.SizeOfOptionalHeader); > for (Index =3D 0; Index < PeHdr->Pe32.FileHeader.NumberOfSecti= ons; > Index++, SectionHeader++) { > diff --git a/BaseTools/Source/C/GenFw/elf_common.h > b/BaseTools/Source/C/GenFw/elf_common.h > index 03dec50cf3..74c253117a 100644 > --- a/BaseTools/Source/C/GenFw/elf_common.h > +++ b/BaseTools/Source/C/GenFw/elf_common.h > @@ -168,11 +168,10 @@ typedef struct { > #define EM_ARC 45 /* Argonaut RISC Core. */ > #define EM_H8_300 46 /* Hitachi H8/300. */ > #define EM_H8_300H 47 /* Hitachi H8/300H. */ > #define EM_H8S 48 /* Hitachi H8S. */ > #define EM_H8_500 49 /* Hitachi H8/500. */ > -#define EM_IA_64 50 /* Intel IA-64 Processor. */ > #define EM_MIPS_X 51 /* Stanford MIPS-X. */ > #define EM_COLDFIRE 52 /* Motorola ColdFire. */ > #define EM_68HC12 53 /* Motorola M68HC12. */ > #define EM_MMA 54 /* Fujitsu MMA. */ > #define EM_PCP 55 /* Siemens PCP. */ > @@ -773,94 +772,10 @@ typedef struct { > #define R_ARM_RREL32 252 > #define R_ARM_RABS32 253 > #define R_ARM_RPC24 254 > #define R_ARM_RBASE 255 >=20 > - > - > -/* Name Value Field Calculation */ > -#define R_IA_64_NONE 0 /* None */ > -#define R_IA_64_IMM14 0x21 /* immediate14 S + A */ > -#define R_IA_64_IMM22 0x22 /* immediate22 S + A */ > -#define R_IA_64_IMM64 0x23 /* immediate64 S + A */ > -#define R_IA_64_DIR32MSB 0x24 /* word32 MSB S + A */ > -#define R_IA_64_DIR32LSB 0x25 /* word32 LSB S + A */ > -#define R_IA_64_DIR64MSB 0x26 /* word64 MSB S + A */ > -#define R_IA_64_DIR64LSB 0x27 /* word64 LSB S + A */ > -#define R_IA_64_GPREL22 0x2a /* immediate22 @gprel(S + A) */ > -#define R_IA_64_GPREL64I 0x2b /* immediate64 @gprel(S + A) */ > -#define R_IA_64_GPREL32MSB 0x2c /* word32 MSB @gprel(S + A) */ > -#define R_IA_64_GPREL32LSB 0x2d /* word32 LSB @gprel(S + A) */ > -#define R_IA_64_GPREL64MSB 0x2e /* word64 MSB @gprel(S + A) */ > -#define R_IA_64_GPREL64LSB 0x2f /* word64 LSB @gprel(S + A) */ > -#define R_IA_64_LTOFF22 0x32 /* immediate22 @ltoff(S + A) */ > -#define R_IA_64_LTOFF64I 0x33 /* immediate64 @ltoff(S + A) */ > -#define R_IA_64_PLTOFF22 0x3a /* immediate22 @pltoff(S + A) */ > -#define R_IA_64_PLTOFF64I 0x3b /* immediate64 @pltoff(S + A) */ > -#define R_IA_64_PLTOFF64MSB 0x3e /* word64 MSB @pltoff(S + A) */ > -#define R_IA_64_PLTOFF64LSB 0x3f /* word64 LSB @pltoff(S + A) */ > -#define R_IA_64_FPTR64I 0x43 /* immediate64 @fptr(S + A) */ > -#define R_IA_64_FPTR32MSB 0x44 /* word32 MSB @fptr(S + A) */ > -#define R_IA_64_FPTR32LSB 0x45 /* word32 LSB @fptr(S + A) */ > -#define R_IA_64_FPTR64MSB 0x46 /* word64 MSB @fptr(S + A) */ > -#define R_IA_64_FPTR64LSB 0x47 /* word64 LSB @fptr(S + A) */ > -#define R_IA_64_PCREL60B 0x48 /* immediate60 form1 S + A - P */ > -#define R_IA_64_PCREL21B 0x49 /* immediate21 form1 S + A - P */ > -#define R_IA_64_PCREL21M 0x4a /* immediate21 form2 S + A - P */ > -#define R_IA_64_PCREL21F 0x4b /* immediate21 form3 S + A - P */ > -#define R_IA_64_PCREL32MSB 0x4c /* word32 MSB S + A - P */ > -#define R_IA_64_PCREL32LSB 0x4d /* word32 LSB S + A - P */ > -#define R_IA_64_PCREL64MSB 0x4e /* word64 MSB S + A - P */ > -#define R_IA_64_PCREL64LSB 0x4f /* word64 LSB S + A - P */ > -#define R_IA_64_LTOFF_FPTR22 0x52 /* immediate22 @ltoff(@fptr(S + > A)) */ > -#define R_IA_64_LTOFF_FPTR64I 0x53 /* immediate64 @ltoff(@fptr(S + > A)) */ > -#define R_IA_64_LTOFF_FPTR32MSB 0x54 /* word32 MSB @ltoff(@fptr(S > + A)) */ > -#define R_IA_64_LTOFF_FPTR32LSB 0x55 /* word32 LSB @ltoff(@fptr(S + > A)) */ > -#define R_IA_64_LTOFF_FPTR64MSB 0x56 /* word64 MSB @ltoff(@fptr(S > + A)) */ > -#define R_IA_64_LTOFF_FPTR64LSB 0x57 /* word64 LSB @ltoff(@fptr(S + > A)) */ > -#define R_IA_64_SEGREL32MSB 0x5c /* word32 MSB @segrel(S + A) */ > -#define R_IA_64_SEGREL32LSB 0x5d /* word32 LSB @segrel(S + A) */ > -#define R_IA_64_SEGREL64MSB 0x5e /* word64 MSB @segrel(S + A) */ > -#define R_IA_64_SEGREL64LSB 0x5f /* word64 LSB @segrel(S + A) */ > -#define R_IA_64_SECREL32MSB 0x64 /* word32 MSB @secrel(S + A) */ > -#define R_IA_64_SECREL32LSB 0x65 /* word32 LSB @secrel(S + A) */ > -#define R_IA_64_SECREL64MSB 0x66 /* word64 MSB @secrel(S + A) */ > -#define R_IA_64_SECREL64LSB 0x67 /* word64 LSB @secrel(S + A) */ > -#define R_IA_64_REL32MSB 0x6c /* word32 MSB BD + A */ > -#define R_IA_64_REL32LSB 0x6d /* word32 LSB BD + A */ > -#define R_IA_64_REL64MSB 0x6e /* word64 MSB BD + A */ > -#define R_IA_64_REL64LSB 0x6f /* word64 LSB BD + A */ > -#define R_IA_64_LTV32MSB 0x74 /* word32 MSB S + A */ > -#define R_IA_64_LTV32LSB 0x75 /* word32 LSB S + A */ > -#define R_IA_64_LTV64MSB 0x76 /* word64 MSB S + A */ > -#define R_IA_64_LTV64LSB 0x77 /* word64 LSB S + A */ > -#define R_IA_64_PCREL21BI 0x79 /* immediate21 form1 S + A - P */ > -#define R_IA_64_PCREL22 0x7a /* immediate22 S + A - P */ > -#define R_IA_64_PCREL64I 0x7b /* immediate64 S + A - P */ > -#define R_IA_64_IPLTMSB 0x80 /* function descriptor MSB special */ > -#define R_IA_64_IPLTLSB 0x81 /* function descriptor LSB speciaal */ > -#define R_IA_64_SUB 0x85 /* immediate64 A - S */ > -#define R_IA_64_LTOFF22X 0x86 /* immediate22 special */ > -#define R_IA_64_LDXMOV 0x87 /* immediate22 special */ > -#define R_IA_64_TPREL14 0x91 /* imm14 @tprel(S + A) */ > -#define R_IA_64_TPREL22 0x92 /* imm22 @tprel(S + A) */ > -#define R_IA_64_TPREL64I 0x93 /* imm64 @tprel(S + A) */ > -#define R_IA_64_TPREL64MSB 0x96 /* word64 MSB @tprel(S + A) */ > -#define R_IA_64_TPREL64LSB 0x97 /* word64 LSB @tprel(S + A) */ > -#define R_IA_64_LTOFF_TPREL22 0x9a /* imm22 @ltoff(@tprel(S+A)) */ > -#define R_IA_64_DTPMOD64MSB 0xa6 /* word64 MSB @dtpmod(S + A) > */ > -#define R_IA_64_DTPMOD64LSB 0xa7 /* word64 LSB @dtpmod(S + A) */ > -#define R_IA_64_LTOFF_DTPMOD22 0xaa /* imm22 > @ltoff(@dtpmod(S+A)) */ > -#define R_IA_64_DTPREL14 0xb1 /* imm14 @dtprel(S + A) */ > -#define R_IA_64_DTPREL22 0xb2 /* imm22 @dtprel(S + A) */ > -#define R_IA_64_DTPREL64I 0xb3 /* imm64 @dtprel(S + A) */ > -#define R_IA_64_DTPREL32MSB 0xb4 /* word32 MSB @dtprel(S + A) */ > -#define R_IA_64_DTPREL32LSB 0xb5 /* word32 LSB @dtprel(S + A) */ > -#define R_IA_64_DTPREL64MSB 0xb6 /* word64 MSB @dtprel(S + A) */ > -#define R_IA_64_DTPREL64LSB 0xb7 /* word64 LSB @dtprel(S + A) */ > -#define R_IA_64_LTOFF_DTPREL22 0xba /* imm22 @ltoff(@dtprel(S+A)) > */ > - > #define R_PPC_NONE 0 /* No relocation. */ > #define R_PPC_ADDR32 1 > #define R_PPC_ADDR24 2 > #define R_PPC_ADDR16 3 > #define R_PPC_ADDR16_LO 4 > diff --git a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h > b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h > index 6ce7fe527f..85b23ebbdd 100644 > --- a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h > +++ b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h > @@ -40,23 +40,20 @@ >=20 > // > // PE32+ Machine type for EFI images > // > #define IMAGE_FILE_MACHINE_I386 0x014c > -#define IMAGE_FILE_MACHINE_IA64 0x0200 > #define IMAGE_FILE_MACHINE_EBC 0x0EBC > #define IMAGE_FILE_MACHINE_X64 0x8664 > #define IMAGE_FILE_MACHINE_ARM 0x01c0 // Thumb only > #define IMAGE_FILE_MACHINE_ARMT 0x01c2 // 32bit Mixed ARM and > Thumb/Thumb 2 Little Endian > #define IMAGE_FILE_MACHINE_ARM64 0xAA64 // 64bit ARM > Architecture, Little Endian >=20 > // > // Support old names for backward compatible > // > #define EFI_IMAGE_MACHINE_IA32 IMAGE_FILE_MACHINE_I386 > -#define EFI_IMAGE_MACHINE_IA64 IMAGE_FILE_MACHINE_IA64 > -#define EFI_IMAGE_MACHINE_IPF IMAGE_FILE_MACHINE_IA64 > #define EFI_IMAGE_MACHINE_EBC IMAGE_FILE_MACHINE_EBC > #define EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64 > #define EFI_IMAGE_MACHINE_ARMT IMAGE_FILE_MACHINE_ARMT > #define EFI_IMAGE_MACHINE_AARCH64 IMAGE_FILE_MACHINE_ARM64 >=20 > diff --git a/BaseTools/Source/C/Makefiles/header.makefile > b/BaseTools/Source/C/Makefiles/header.makefile > index 7f283d6464..7828bbe4dc 100644 > --- a/BaseTools/Source/C/Makefiles/header.makefile > +++ b/BaseTools/Source/C/Makefiles/header.makefile > @@ -1,11 +1,10 @@ > ## @file > # > # The makefile can be invoked with > # HOST_ARCH =3D x86_64 or x64 for EM64T build > # HOST_ARCH =3D ia32 or IA32 for IA32 build > -# HOST_ARCH =3D ia64 or IA64 for IA64 build > # HOST_ARCH =3D Arm or ARM for ARM build > # > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the = BSD > License > diff --git a/BaseTools/Source/C/VolInfo/VolInfo.c > b/BaseTools/Source/C/VolInfo/VolInfo.c > index bf00af0566..89fe3a044d 100644 > --- a/BaseTools/Source/C/VolInfo/VolInfo.c > +++ b/BaseTools/Source/C/VolInfo/VolInfo.c > @@ -1571,11 +1571,11 @@ Returns: > free ((VOID *) MemoryImagePointer); >=20 > // > // Update Image Base Address > // > - if ((ImgHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (ImgHdr- > >Pe32.FileHeader.Machine !=3D IMAGE_FILE_MACHINE_IA64)) { > + if ((ImgHdr->Pe32.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) { > ImgHdr->Pe32.OptionalHeader.ImageBase =3D (UINT32) > NewPe32BaseAddress; > } else if (ImgHdr->Pe32Plus.OptionalHeader.Magic =3D=3D > EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) { > ImgHdr->Pe32Plus.OptionalHeader.ImageBase =3D NewPe32BaseAddress; > } else { > Error (NULL, 0, 3000, "Invalid", "unknown PE magic signature %X in P= E32 > image %s", > -- > 2.19.1.windows.1