From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=paul.a.lohr@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6CC9F2117D283 for ; Mon, 29 Oct 2018 13:33:08 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Oct 2018 13:33:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,441,1534834800"; d="scan'208";a="269785252" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 29 Oct 2018 13:33:07 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 29 Oct 2018 13:33:07 -0700 Received: from fmsmsx118.amr.corp.intel.com ([169.254.1.160]) by FMSMSX114.amr.corp.intel.com ([169.254.6.207]) with mapi id 14.03.0415.000; Mon, 29 Oct 2018 13:33:06 -0700 From: "Lohr, Paul A" To: Laszlo Ersek , "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" , "Yao, Jiewen" Thread-Topic: [edk2] [PATCH] MdeModulePkg/PiSmmIpl: Do not reset SMRAM to UC when CPU driver runs Thread-Index: AQHUahPKIbNaSTcWXkOJpjfEQUVWn6UsJ0nAgADhsYCAAAIOAIAJokuQ Date: Mon, 29 Oct 2018 20:33:06 +0000 Message-ID: References: <20181022090333.95988-1-ruiyu.ni@intel.com> <1998f4ff-13e0-3918-db78-74ada10fddc0@Intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiN2QzOTlhZTYtM2U0YS00YmJmLThhYmEtOWU3MDEzOThjYzc3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiXC9iNVFrK1Q0WkRBTTVKYVJsb0c3R0trQzFUYTVlaVJSZHp2Szg5bUFqN0M0WTE5RWp6Z29DMmxXMXJ6Y1Bmc2QifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.107] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/PiSmmIpl: Do not reset SMRAM to UC when CPU driver runs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Oct 2018 20:33:08 -0000 Content-Language: en-US Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 SGVsbG8gLSB1cGRhdGUgb24gdGhpcyBpc3N1ZToNCg0KMSkgU01SQU0gPSBVQyBpbiBTbW1JcGxE eGVEaXNwYXRjaEV2ZW50Tm90aWZ5KCkgYXJvdW5kIGxpbmUgNjUwIGNhbiBiZSByZW1vdmVkLCB5 ZXMuICBDb2RlIG5ldmVyIG1vZGlmaWVkIGFueXRoaW5nLCBzbyB0aGVyZSBpcyBub3RoaW5nIHRv ICJ1bmRvLiINCjIpIFNNUkFNID0gV0IgXCBTTVJBTSA9IFVDIGluIFNtbUlwbEVudHJ5KCkgYXJv dW5kIGxpbmVzIDE2MDAtMTY3NSBpcyBzdGlsbCBiZWluZyBjb25zaWRlcmVkLiANCg0KUGxlYXNl IHNlcGFyYXRlIHRoZXNlIGNoZWNrLWlucyBhbmQgYmVnaW4gY2hlY2tpbmcgaW4gIzEuICBXZSBj YW4gY29udGludWUgdGhlIGRpc2N1c3Npb24gb24gIzIuDQoNClBhdWwgQS4gTG9ociDigJMgU2Vy dmVyIEZpcm13YXJlIEVuYWJsaW5nDQo1MTIuMjM5LjkwNzMgKGNlbGwpDQo1MTIuNzk0LjUwNDQg KHdvcmspDQoNCi0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQpGcm9tOiBMYXN6bG8gRXJzZWsg PGxlcnNla0ByZWRoYXQuY29tPiANClNlbnQ6IFR1ZXNkYXksIE9jdG9iZXIgMjMsIDIwMTggNDo0 NCBBTQ0KVG86IE5pLCBSdWl5dSA8cnVpeXUubmlAaW50ZWwuY29tPjsgTG9ociwgUGF1bCBBIDxw YXVsLmEubG9ockBpbnRlbC5jb20+OyBlZGsyLWRldmVsQGxpc3RzLjAxLm9yZw0KQ2M6IEtpbm5l eSwgTWljaGFlbCBEIDxtaWNoYWVsLmQua2lubmV5QGludGVsLmNvbT47IFlhbywgSmlld2VuIDxq aWV3ZW4ueWFvQGludGVsLmNvbT4NClN1YmplY3Q6IFJlOiBbZWRrMl0gW1BBVENIXSBNZGVNb2R1 bGVQa2cvUGlTbW1JcGw6IERvIG5vdCByZXNldCBTTVJBTSB0byBVQyB3aGVuIENQVSBkcml2ZXIg cnVucw0KDQpPbiAxMC8yMy8xOCAxMTozNiwgTmksIFJ1aXl1IHdyb3RlOg0KPiBPbiAxMC8yMy8y MDE4IDExOjEyIEFNLCBMb2hyLCBQYXVsIEEgd3JvdGU6DQo+PiBIZWxsbywNCj4+DQo+PiBDb2Rl IHRvIHJlbW92ZSBTTVJBTSA9IFVDIChsaW5lIDY1MC1pc2gpIGxvb2tzIGdvb2QuwqAgSSB3b3Vs ZCBzdWdnZXN0IA0KPj4gYWRkaW5nIHNvbWUgZGVidWcgY29tbWVudHMgaW4gdGhlIGFyZWEgaXQg d2FzIHJlbW92ZWQuwqAgVGhhbmtzLg0KPiANCj4gZGVidWcgbWVzc2FnZSBvciBjb21tZW50cz8N Cj4gSSBndWVzcyB5b3UnZCBsaWtlIHRvIGhhdmUgc29tZSBjb21tZW50cyB0byBzYXkgIlNNUlIg aXMgZW5hYmxlZCBieSANCj4gQ1BVIFNNTSBkcml2ZXIgc28gbm8gbmVlZCB0byByZXNldCB0aGUg U01SQU0gdG8gVUMgaW4gTVRSUiIuIENvcnJlY3Q/DQoNClN1Y2ggYSBjb21tZW50IHNvdW5kcyBn cmVhdCB0byBtZSwganVzdCBwbGVhc2UgaW5jbHVkZTogImJ5IGNhbGxpbmcgU21tQ3B1RmVhdHVy ZXNJbml0aWFsaXplUHJvY2Vzc29yIGZyb20gU21tQ3B1RmVhdHVyZXNMaWIiLg0KDQpbLi4uXQ0K DQpUaGFua3MhDQpMYXN6bG8NCg==