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Thread-Topic: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Star, this is following current specification. Thanks, Chasel > -----Original Message----- > From: Zeng, Star > Sent: Wednesday, July 20, 2022 8:07 PM > To: Chiu, Chasel ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L ; Zeng, Star > > Subject: RE: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD. >=20 > Is the reserved bytes number correct for FSPI_ARCH_UPD alignment? > UINT16 BootloaderSmmFvContextDataLength; > UINT8 Reserved1[24]; >=20 > Thanks, > Star > -----Original Message----- > From: Chiu, Chasel > Sent: Thursday, July 21, 2022 10:29 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3993 >=20 > Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up, > and some comments for clarification. > Also fixed a bug in SplitFspBin.py for FSP-I support. >=20 > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > --- > IntelFsp2Pkg/Include/FspEas/FspApi.h | 71 > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- > ----- > IntelFsp2Pkg/Include/FspGlobalData.h | 2 +- > IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++++++++++++++++++-- > IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +- > 4 files changed, 85 insertions(+), 11 deletions(-) >=20 > diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h > b/IntelFsp2Pkg/Include/FspEas/FspApi.h > index bf46f13f73..3f368574e8 100644 > --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h > +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h > @@ -1,6 +1,6 @@ > /** @file >=20 > Intel FSP API definition from Intel Firmware Support Package External >=20 > - Architecture Specification v2.0 - v2.2 >=20 > + Architecture Specification v2.0 and above. >=20 >=20 >=20 > Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
>=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > @@ -100,13 +100,14 @@ typedef struct { > /// "XXXXXX_T" for FSP-T >=20 > /// "XXXXXX_M" for FSP-M >=20 > /// "XXXXXX_S" for FSP-S >=20 > + /// "XXXXXX_I" for FSP-I >=20 > /// Where XXXXXX is an unique signature >=20 > /// >=20 > UINT64 Signature; >=20 > /// >=20 > /// Revision of the Data structure. >=20 > - /// For FSP spec 2.0/2.1 value is 1. >=20 > - /// For FSP spec 2.2 value is 2. >=20 > + /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having > ARCH_UPD. >=20 > + /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present= in all > UPD structures. >=20 > /// >=20 > UINT8 Revision; >=20 > UINT8 Reserved[23]; >=20 > @@ -134,7 +135,7 @@ typedef struct { > } FSPT_ARCH_UPD; >=20 >=20 >=20 > /// >=20 > -/// FSPT_ARCH2_UPD Configuration. >=20 > +/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above. >=20 > /// >=20 > typedef struct { >=20 > /// >=20 > @@ -196,7 +197,7 @@ typedef struct { > } FSPM_ARCH_UPD; >=20 >=20 >=20 > /// >=20 > -/// FSPM_ARCH2_UPD Configuration. >=20 > +/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above. >=20 > /// >=20 > typedef struct { >=20 > /// >=20 > @@ -209,6 +210,13 @@ typedef struct { > /// >=20 > UINT32 Length; >=20 > /// >=20 > + /// Pointer to the non-volatile storage (NVS) data buffer. >=20 > + /// If it is NULL it indicates the NVS data is not available. >=20 > + /// This value is deprecated starting with v2.4 of the FSP > + specification, >=20 > + /// and will be removed in an upcoming version of the FSP specificatio= n. >=20 > + /// >=20 > + EFI_PHYSICAL_ADDRESS NvsBufferPtr; >=20 > + /// >=20 > /// Pointer to the temporary stack base address to be >=20 > /// consumed inside FspMemoryInit() API. >=20 > /// >=20 > @@ -232,7 +240,7 @@ typedef struct { > /// This value is only valid if Revision is >=3D 2. >=20 > /// >=20 > EFI_PHYSICAL_ADDRESS FspEventHandler; >=20 > - UINT8 Reserved1[24]; >=20 > + UINT8 Reserved1[16]; >=20 > } FSPM_ARCH2_UPD; >=20 >=20 >=20 > /// >=20 > @@ -265,7 +273,7 @@ typedef struct { > } FSPS_ARCH_UPD; >=20 >=20 >=20 > /// >=20 > -/// FSPS_ARCH2_UPD Configuration. >=20 > +/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above. >=20 > /// >=20 > typedef struct { >=20 > /// >=20 > @@ -285,6 +293,40 @@ typedef struct { > UINT8 Reserved1[16]; >=20 > } FSPS_ARCH2_UPD; >=20 >=20 >=20 > +/// >=20 > +/// FSPI_ARCH_UPD Configuration. >=20 > +/// >=20 > +typedef struct { >=20 > + /// >=20 > + /// Revision of the structure is 1 for this version of the specificati= on. >=20 > + /// >=20 > + UINT8 Revision; >=20 > + UINT8 Reserved[3]; >=20 > + /// >=20 > + /// Length of the structure in bytes. The current value for this field= is 32. >=20 > + /// >=20 > + UINT32 Length; >=20 > + /// >=20 > + /// The physical memory-mapped base address of the bootloader SMM > firmware volume (FV). >=20 > + /// >=20 > + EFI_PHYSICAL_ADDRESS BootloaderSmmFvBaseAddress; >=20 > + /// >=20 > + /// The length in bytes of the bootloader SMM firmware volume (FV). >=20 > + /// >=20 > + UINT64 BootloaderSmmFvLength; >=20 > + /// >=20 > + /// The physical memory-mapped base address of the bootloader SMM FV > context data. >=20 > + /// This data is provided to bootloader SMM drivers through a HOB by t= he FSP > MM Foundation. >=20 > + /// >=20 > + EFI_PHYSICAL_ADDRESS BootloaderSmmFvContextData; >=20 > + /// >=20 > + /// The length in bytes of the bootloader SMM FV context data. >=20 > + /// This data is provided to bootloader SMM drivers through a HOB by t= he FSP > MM Foundation. >=20 > + /// >=20 > + UINT16 BootloaderSmmFvContextDataLength; >=20 > + UINT8 Reserved1[24]; >=20 > +} FSPI_ARCH_UPD; >=20 > + >=20 > /// >=20 > /// FSPT_UPD_COMMON Configuration. >=20 > /// >=20 > @@ -393,6 +435,21 @@ typedef struct { > FSPS_ARCH2_UPD FspsArchUpd; >=20 > } FSPS_UPD_COMMON_FSP24; >=20 >=20 >=20 > +/// >=20 > +/// FSPI_UPD_COMMON Configuration. >=20 > +/// >=20 > +typedef struct { >=20 > + /// >=20 > + /// FSP_UPD_HEADER Configuration. >=20 > + /// >=20 > + FSP_UPD_HEADER FspUpdHeader; >=20 > + >=20 > + /// >=20 > + /// FSPI_ARCH_UPD Configuration. >=20 > + /// >=20 > + FSPI_ARCH_UPD FspiArchUpd; >=20 > +} FSPI_UPD_COMMON; >=20 > + >=20 > /// >=20 > /// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE. >=20 > /// >=20 > diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h > b/IntelFsp2Pkg/Include/FspGlobalData.h > index 697b20ed4c..cf94f7b6a5 100644 > --- a/IntelFsp2Pkg/Include/FspGlobalData.h > +++ b/IntelFsp2Pkg/Include/FspGlobalData.h > @@ -12,7 +12,7 @@ >=20 >=20 > #define FSP_IN_API_MODE 0 >=20 > #define FSP_IN_DISPATCH_MODE 1 >=20 > -#define FSP_GLOBAL_DATA_VERSION 1 >=20 > +#define FSP_GLOBAL_DATA_VERSION 0x2 >=20 >=20 >=20 > #pragma pack(1) >=20 >=20 >=20 > diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h > b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h > index c7fb63168f..5381716d81 100644 > --- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h > +++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h > @@ -52,7 +52,7 @@ typedef struct { > UINT8 Reserved1[2]; >=20 > /// >=20 > /// Byte 0x0A: Indicates compliance with a revision of this specificat= ion in the > BCD format. >=20 > - /// For revision v2.3 the value will be 0x23. >=20 > + /// For revision v2.4 the value will be 0x24. >=20 > /// >=20 > UINT8 SpecVersion; >=20 > /// >=20 > @@ -93,11 +93,28 @@ typedef struct { > /// Bit 0: Graphics Support - Set to 1 when FSP supports enabling Gr= aphics > Display. >=20 > /// Bit 1: Dispatch Mode Support - Set to 1 when FSP supports the op= tional > Dispatch Mode API defined in Section 7.2 and 9. This bit is only valid if= FSP > HeaderRevision is >=3D 4. >=20 > /// Bit 2: 64-bit mode support - Set to 1 to indicate FSP supports 6= 4-bit long > mode interfaces. Set to 0 to indicate FSP supports 32-bit mode interfaces= . This > bit is only valid if FSP HeaderRevision is >=3D 7. >=20 > - /// Bits 15:3 - Reserved >=20 > + /// Bit 3: FSP Variable Services Support - Set to 1 to indicate FSP = utilizes the > FSP Variable Services defined in Section 9.6 to store non-volatile data. = This bit is > only valid if FSP HeaderRevision is >=3D 7. >=20 > + /// Bits 15:4 - Reserved >=20 > /// >=20 > UINT16 ImageAttribute; >=20 > /// >=20 > /// Byte 0x22: Attributes of the FSP Component. >=20 > + /// Bit 0 - Build Type >=20 > + /// 0 - Debug Build >=20 > + /// 1 - Release Build >=20 > + /// Bit 1 - Release Type >=20 > + /// 0 - Test Release >=20 > + /// 1 - Official Release >=20 > + /// Bit 11:2 - Reserved >=20 > + /// Bits 15:12 - Component Type >=20 > + /// 0000 - Reserved >=20 > + /// 0001 - FSP-T >=20 > + /// 0010 - FSP-M >=20 > + /// 0011 - FSP-S >=20 > + /// 0100 - FSP-I (FSP SMM) >=20 > + /// 0101 to 0111 - Reserved >=20 > + /// 1000 - FSP-O >=20 > + /// 1001 to 1111 - Reserved >=20 > /// >=20 > UINT16 ComponentAttribute; >=20 > /// >=20 > diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py > b/IntelFsp2Pkg/Tools/SplitFspBin.py > index 317d9c1fa0..ddabab7d8c 100644 > --- a/IntelFsp2Pkg/Tools/SplitFspBin.py > +++ b/IntelFsp2Pkg/Tools/SplitFspBin.py > @@ -492,7 +492,7 @@ class FspImage: > self.FihOffset =3D fihoff >=20 > self.Offset =3D offset >=20 > self.FvIdxList =3D [] >=20 > - self.Type =3D "XTMSIXXXXOXXXXXXX"[(fih.ComponentAttribute >= > 12) & > 0x0F] >=20 > + self.Type =3D "XTMSIXXXOXXXXXXX"[(fih.ComponentAttribute >>= 12) & > 0x0F] >=20 > self.PatchList =3D patch >=20 > self.PatchList.append(fihoff + 0x1C) >=20 >=20 >=20 > -- > 2.35.0.windows.1